[PATCH] D30086: Add generic IR vector reductions

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added a comment.

Don't you need unrolling support for the strict float opcodes? As I understand it, the shuffle reductions can't be used?



================
Comment at: include/llvm/CodeGen/ISDOpcodes.h:773
 
+    /// Generic reduction nodes.
+    VECREDUCE_FADD, VECREDUCE_FMUL,
----------------
Please can you improve the description here, especially detailing the difference between the no-strict/strict version of fadd/fmul.


================
Comment at: include/llvm/CodeGen/SelectionDAGNodes.h:1077
+  }
+};
+
----------------
If possible I'd like to see this generalization of the SDNodeFlags support added separately first, reducing this patch and allow us to get on with adding triple node support for FMA opcodes.


Repository:
  rL LLVM

https://reviews.llvm.org/D30086