[PATCH] D32352: Go to eleven

[Zvi Rackover via Phabricator via llvm-commits]

zvi added a comment.

In https://reviews.llvm.org/D32352#735716, @RKSimon wrote:

> In the meantime we might be better off only using multiple LEA calls when !Subtarget->slowLEA() ? In which case we need to add tests for silvermont


At least the tests in this patch don't show that any 'slow' LEA is being generated.

As a reminder, here's what the Intel Optimization Manual says about 'slow' LEA's:

> For LEA instructions with three source operands and some specific situations, instruction latency has
>  increased to 3 cycles, and must dispatch via port 1:
>  — LEA that has all three source operands: base, index, and offset.
>  — LEA that uses base and index registers where the base is EBP, RBP, or R13.
>  — LEA that uses RIP relative addressing mode.
>  — LEA that uses 16-bit addressing mode.

It would be interesting to see tests that mimic expressions such as: (x*9+42)*(x*5+2) where it would be temping to select two 3-operand LEAs:

  leal    42(%rdi,%rdi,8), %ecx
  leal    2(%rdi,%rdi,4), %eax
  imull   %ecx, %eax



================
Comment at: lib/Target/X86/X86ISelLowering.cpp:30970
                           const X86Subtarget &Subtarget) {
+  if (!MulConstantOptimization)
+    return SDValue();
----------------
This flags is intended also for vector types?


================
Comment at: lib/Target/X86/X86ISelLowering.cpp:31032
+  } else {
+    switch (MulAmt) {
+    default:
----------------
Please consider moving this switch into a helper function.


https://reviews.llvm.org/D32352