[PATCH] D32394: Add extra operand to CALLSEQ_START to keep frame part set up previously

[Serge Pavlov via Phabricator via llvm-commits]

sepavloff created this revision.
Herald added subscribers: sbc100, nemanjai, jyknight, dschuff, jfb, MatzeB, rengolin, aemerson, jholewinski.
Herald added a reviewer: javed.absar.

Using arguments with attribute inalloca creates problems for verification
of machine representation. This attribute instructs the backend that the
argument is prepared in stack prior to  CALLSEQ_START..CALLSEQ_END
sequence (see http://llvm.org/docs/InAlloca.htm for details). Frame size
stored in CALLSEQ_START in this case does not count the size of this
argument. However CALLSEQ_END still keeps total frame size, as caller can
be responsible for cleanup of entire frame. So CALLSEQ_START and
CALLSEQ_END keep different frame size and the difference is treated by
MachineVerifier as stack error. Currently there is no way to distinguish
this case from actual errors.

This patch adds additional argument to CALLSEQ_START and its
target-specific counterparts to keep size of stack that is set up prior to
the call frame sequence. This argument allows MachineVerifier to calculate
actual frame size associated with frame setup instruction and correctly
process the case of inalloca arguments.

The changes made by the patch are:

- Frame setup instructions get the second mandatory argument. It affects all targets that use frame pseudo instructions and touched many files although the changes are uniform.
- Access to frame properties are implemented using special instructions rather than calls getOperand(N).getImm(). For X86 and ARM such replacement was made previously.
- Changes that reflect appearance of additional argument of frame setup instruction. These involve proper instruction initialization and methods that access instruction arguments.
- MachineVerifier retrieves frame size using method, which reports sum of frame parts initialized inside frame instruction pair and outside it.

The patch implements approach proposed by Quentin Colombet in
https://bugs.llvm.org/show_bug.cgi?id=27481#c1.
It fixes 9 tests failed with machine verifier enabled and listed
in PR27481.


https://reviews.llvm.org/D32394

Files:
  include/llvm/CodeGen/ISDOpcodes.h
  include/llvm/CodeGen/SelectionDAG.h
  include/llvm/Target/TargetInstrInfo.h
  include/llvm/Target/TargetSelectionDAG.td
  lib/CodeGen/MachineVerifier.cpp
  lib/CodeGen/SelectionDAG/FastISel.cpp
  lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
  lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
  lib/Target/AArch64/AArch64CallLowering.cpp
  lib/Target/AArch64/AArch64FastISel.cpp
  lib/Target/AArch64/AArch64ISelLowering.cpp
  lib/Target/AArch64/AArch64InstrInfo.td
  lib/Target/ARM/ARMBaseInstrInfo.h
  lib/Target/ARM/ARMCallLowering.cpp
  lib/Target/ARM/ARMFastISel.cpp
  lib/Target/ARM/ARMISelLowering.cpp
  lib/Target/ARM/ARMInstrInfo.td
  lib/Target/ARM/ARMInstrThumb.td
  lib/Target/AVR/AVRFrameLowering.cpp
  lib/Target/AVR/AVRISelLowering.cpp
  lib/Target/AVR/AVRInstrInfo.td
  lib/Target/BPF/BPFISelLowering.cpp
  lib/Target/BPF/BPFInstrInfo.td
  lib/Target/Hexagon/HexagonISelLowering.cpp
  lib/Target/Hexagon/HexagonPatterns.td
  lib/Target/Hexagon/HexagonPseudo.td
  lib/Target/Lanai/LanaiISelLowering.cpp
  lib/Target/Lanai/LanaiInstrInfo.td
  lib/Target/MSP430/MSP430FrameLowering.cpp
  lib/Target/MSP430/MSP430ISelLowering.cpp
  lib/Target/MSP430/MSP430InstrInfo.h
  lib/Target/MSP430/MSP430InstrInfo.td
  lib/Target/Mips/MipsFastISel.cpp
  lib/Target/Mips/MipsISelLowering.cpp
  lib/Target/Mips/MipsInstrInfo.td
  lib/Target/NVPTX/NVPTXISelLowering.cpp
  lib/Target/NVPTX/NVPTXInstrInfo.td
  lib/Target/PowerPC/PPCFastISel.cpp
  lib/Target/PowerPC/PPCISelLowering.cpp
  lib/Target/PowerPC/PPCInstrInfo.td
  lib/Target/PowerPC/PPCTLSDynamicCall.cpp
  lib/Target/Sparc/SparcISelLowering.cpp
  lib/Target/Sparc/SparcInstrInfo.td
  lib/Target/SystemZ/SystemZISelLowering.cpp
  lib/Target/SystemZ/SystemZInstrInfo.td
  lib/Target/SystemZ/SystemZOperators.td
  lib/Target/WebAssembly/WebAssemblyInstrCall.td
  lib/Target/WebAssembly/WebAssemblyInstrInfo.td
  lib/Target/X86/X86FastISel.cpp
  lib/Target/X86/X86ISelLowering.cpp
  lib/Target/X86/X86InstrCompiler.td
  lib/Target/X86/X86InstrInfo.h
  lib/Target/X86/X86InstrInfo.td
  lib/Target/XCore/XCoreISelLowering.cpp
  lib/Target/XCore/XCoreInstrInfo.td
  test/CodeGen/AArch64/GlobalISel/call-translator.ll
  test/CodeGen/AArch64/stackmap-frame-setup.ll
  test/CodeGen/Hexagon/regalloc-bad-undef.mir
  test/CodeGen/Lanai/peephole-compare.mir
  test/CodeGen/MIR/X86/frame-info-save-restore-points.mir
  test/CodeGen/PowerPC/stackmap-frame-setup.ll
  test/CodeGen/X86/stackmap-frame-setup.ll

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