[llvm] r301104 - [APInt] Use operator<<= where possible. NFC

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Sat Apr 22 22:43:03 PDT 2017


Author: ctopper
Date: Sun Apr 23 00:43:02 2017
New Revision: 301104

URL: http://llvm.org/viewvc/llvm-project?rev=301104&view=rev
Log:
[APInt] Use operator<<= where possible. NFC

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=301104&r1=301103&r2=301104&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Sun Apr 23 00:43:02 2017
@@ -2323,8 +2323,8 @@ void SelectionDAG::computeKnownBits(SDVa
     if (const APInt *ShAmt = getValidShiftAmountConstant(Op)) {
       computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, DemandedElts,
                        Depth + 1);
-      KnownZero = KnownZero << *ShAmt;
-      KnownOne = KnownOne << *ShAmt;
+      KnownZero <<= *ShAmt;
+      KnownOne <<= *ShAmt;
       // Low bits are known zero.
       KnownZero.setLowBits(ShAmt->getZExtValue());
     }

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=301104&r1=301103&r2=301104&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Sun Apr 23 00:43:02 2017
@@ -1714,7 +1714,7 @@ SDValue TargetLowering::SimplifySetCC(EV
               bestWidth = width;
               break;
             }
-            newMask = newMask << width;
+            newMask <<= width;
           }
         }
       }

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=301104&r1=301103&r2=301104&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Sun Apr 23 00:43:02 2017
@@ -26717,8 +26717,8 @@ void X86TargetLowering::computeKnownBits
       DAG.computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth + 1);
       unsigned ShAmt = ShiftImm->getZExtValue();
       if (Opc == X86ISD::VSHLI) {
-        KnownZero = KnownZero << ShAmt;
-        KnownOne = KnownOne << ShAmt;
+        KnownZero <<= ShAmt;
+        KnownOne <<= ShAmt;
         // Low bits are known zero.
         KnownZero.setLowBits(ShAmt);
       } else {




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