[llvm] r301036 - ARM: make sure we use all entries in a vector before forming a vpaddl.

[Tim Northover via llvm-commits]

Author: tnorthover
Date: Fri Apr 21 15:35:52 2017
New Revision: 301036

URL: http://llvm.org/viewvc/llvm-project?rev=301036&view=rev
Log:
ARM: make sure we use all entries in a vector before forming a vpaddl.

Otherwise there's some mismatch, and we'll either form an illegal type or an
illegal node.

Thanks to Eli Friedman for pointing out the problem with my original solution.

Modified:
    llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
    llvm/trunk/test/CodeGen/ARM/vpadd.ll

Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=301036&r1=301035&r2=301036&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Fri Apr 21 15:35:52 2017
@@ -9480,11 +9480,11 @@ AddCombineBUILD_VECTORToVPADDL(SDNode *N
       return SDValue();
   }
 
-  // Don't generate vpaddl+vmovn; we'll match it to vpadd later. Also don't try
-  // to handle an i8 -> i32 situation (or similar). vpaddl can only double the
-  // size.
-  if (2 * Vec.getValueType().getVectorElementType().getSizeInBits() !=
-      VT.getVectorElementType().getSizeInBits())
+  // Don't generate vpaddl+vmovn; we'll match it to vpadd later. Also make sure
+  // we're using the entire input vector, otherwise there's a size/legality
+  // mismatch somewhere.
+  if (nextIndex != Vec.getValueType().getVectorNumElements() ||
+      Vec.getValueType().getVectorElementType() == VT.getVectorElementType())
     return SDValue();
 
   // Create VPADDL node.

Modified: llvm/trunk/test/CodeGen/ARM/vpadd.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/vpadd.ll?rev=301036&r1=301035&r2=301036&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/vpadd.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/vpadd.ll Fri Apr 21 15:35:52 2017
@@ -495,6 +495,15 @@ define <2 x i8> @fromExtendingExtractVec
   ret <2 x i8> %x
 }
 
+define <2 x i16> @fromExtendingExtractVectorElt_2i16(<8 x i16> %in) {
+; CHECK-LABEL: fromExtendingExtractVectorElt_2i16:
+; CHECK:    vadd.i32
+ %tmp1 = shufflevector <8 x i16> %in, <8 x i16> undef, <2 x i32> <i32 0, i32 2>
+ %tmp2 = shufflevector <8 x i16> %in, <8 x i16> undef, <2 x i32> <i32 1, i32 3>
+ %x = add <2 x i16> %tmp2, %tmp1
+ ret <2 x i16> %x
+}
+
 
 declare <4 x i16> @llvm.arm.neon.vpaddls.v4i16.v8i8(<8 x i8>) nounwind readnone
 declare <2 x i32> @llvm.arm.neon.vpaddls.v2i32.v4i16(<4 x i16>) nounwind readnone