[PATCH] D32364: [AMDGPU] Handle SI_MASKED_UNREACHABLE in instruction emitter
Yaxun Liu via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Apr 21 12:44:50 PDT 2017
This revision was automatically updated to reflect the committed changes.
Closed by commit rL301025: [AMDGPU] Handle SI_MASKED_UNREACHABLE in instruction emitter (authored by yaxunl).
Changed prior to commit:
https://reviews.llvm.org/D32364?vs=96189&id=96206#toc
Repository:
rL LLVM
https://reviews.llvm.org/D32364
Files:
llvm/trunk/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
llvm/trunk/test/CodeGen/AMDGPU/llvm.amdgcn.unreachable.ll
Index: llvm/trunk/test/CodeGen/AMDGPU/llvm.amdgcn.unreachable.ll
===================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/llvm.amdgcn.unreachable.ll
+++ llvm/trunk/test/CodeGen/AMDGPU/llvm.amdgcn.unreachable.ll
@@ -0,0 +1,9 @@
+; RUN: llc -march amdgcn %s -filetype=obj
+; RUN: llc -march amdgcn <%s | FileCheck %s
+define amdgpu_kernel void @f() {
+ ; CHECK: ; divergent unreachable
+ call void @llvm.amdgcn.unreachable()
+ ret void
+}
+
+declare void @llvm.amdgcn.unreachable()
Index: llvm/trunk/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
===================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
@@ -225,6 +225,12 @@
return;
}
+ if (MI->getOpcode() == AMDGPU::SI_MASKED_UNREACHABLE) {
+ if (isVerbose())
+ OutStreamer->emitRawComment(" divergent unreachable");
+ return;
+ }
+
MCInst TmpInst;
MCInstLowering.lower(MI, TmpInst);
EmitToStreamer(*OutStreamer, TmpInst);
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