[llvm] r300892 - [AArch64] Refine Falkor machine description for pre/post-inc and stores.
Chad Rosier via llvm-commits
llvm-commits at lists.llvm.org
Thu Apr 20 14:11:09 PDT 2017
Author: mcrosier
Date: Thu Apr 20 16:11:09 2017
New Revision: 300892
URL: http://llvm.org/viewvc/llvm-project?rev=300892&view=rev
Log:
[AArch64] Refine Falkor machine description for pre/post-inc and stores.
Modified:
llvm/trunk/lib/Target/AArch64/AArch64SchedFalkor.td
Modified: llvm/trunk/lib/Target/AArch64/AArch64SchedFalkor.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64SchedFalkor.td?rev=300892&r1=300891&r2=300892&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64SchedFalkor.td (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64SchedFalkor.td Thu Apr 20 16:11:09 2017
@@ -79,14 +79,14 @@ def : WriteRes<WriteIM64, [FalkorUnitX]
def : WriteRes<WriteBr, [FalkorUnitB]> { let Latency = 1; }
def : WriteRes<WriteBrReg, [FalkorUnitB]> { let Latency = 1; }
def : WriteRes<WriteLD, [FalkorUnitLD]> { let Latency = 3; }
-def : WriteRes<WriteST, [FalkorUnitLD, FalkorUnitST, FalkorUnitSD]>
- { let Latency = 3; let NumMicroOps = 3; }
+def : WriteRes<WriteST, [FalkorUnitST, FalkorUnitSD]>
+ { let Latency = 0; let NumMicroOps = 2; }
def : WriteRes<WriteSTP, [FalkorUnitST, FalkorUnitSD]>
{ let Latency = 0; let NumMicroOps = 2; }
-def : WriteRes<WriteAdr, [FalkorUnitXYZ]> { let Latency = 5; }
+def : WriteRes<WriteAdr, [FalkorUnitXYZ]> { let Latency = 1; }
def : WriteRes<WriteLDIdx, [FalkorUnitLD]> { let Latency = 5; }
-def : WriteRes<WriteSTIdx, [FalkorUnitLD, FalkorUnitST, FalkorUnitSD]>
- { let Latency = 4; let NumMicroOps = 3; }
+def : WriteRes<WriteSTIdx, [FalkorUnitST, FalkorUnitSD]>
+ { let Latency = 0; let NumMicroOps = 3; }
def : WriteRes<WriteF, [FalkorUnitVXVY, FalkorUnitVXVY]>
{ let Latency = 3; let NumMicroOps = 2; }
def : WriteRes<WriteFCmp, [FalkorUnitVXVY]> { let Latency = 2; }
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