[PATCH] D31815: [Thumb1] The recently added tADCS and tSBCS pseudo-instructions were missing `Uses = [CPSR]`
A. Skrobov via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Apr 20 11:24:47 PDT 2017
tyomitch updated this revision to Diff 95989.
tyomitch added a comment.
Sorry for the long delay! Test case updated to make the long adds explicit, and not depend on constant hoisting.
https://reviews.llvm.org/D31815
Files:
lib/Target/ARM/ARMInstrThumb.td
test/CodeGen/Thumb/long.ll
Index: test/CodeGen/Thumb/long.ll
===================================================================
--- test/CodeGen/Thumb/long.ll
+++ test/CodeGen/Thumb/long.ll
@@ -206,3 +206,34 @@
; CHECK: adds r0, r0, r2
; CHECK: sbcs r1, r3
}
+
+declare void @f13(i64 %x)
+
+define void @f14(i1 %x, i64 %y) #0 {
+; CHECK-LABEL: f14:
+entry:
+ %a = add i64 %y, 47
+ call void @f13(i64 %a)
+; CHECK: bl
+ br i1 %x, label %if.end, label %if.then
+
+if.then:
+ call void @f13(i64 %y)
+; CHECK: bl
+ br label %if.end
+
+if.end:
+ %b = add i64 %y, 45
+ call void @f13(i64 %b)
+; CHECK: adds
+; CHECK: adcs
+; CHECK: bl
+ %c = add i64 %y, 47
+ call void @f13(i64 %c)
+; CHECK: adds
+; CHECK: adcs
+; CHECK: bl
+ ret void
+}
+
+attributes #0 = { optsize }
Index: lib/Target/ARM/ARMInstrThumb.td
===================================================================
--- lib/Target/ARM/ARMInstrThumb.td
+++ lib/Target/ARM/ARMInstrThumb.td
@@ -953,7 +953,7 @@
/// These opcodes will be converted to the real non-S opcodes by
/// AdjustInstrPostInstrSelection after giving then an optional CPSR operand.
let hasPostISelHook = 1, Defs = [CPSR] in {
- let isCommutable = 1 in
+ let isCommutable = 1, Uses = [CPSR] in
def tADCS : tPseudoInst<(outs tGPR:$Rdn), (ins tGPR:$Rn, tGPR:$Rm),
2, IIC_iALUr,
[(set tGPR:$Rdn, CPSR, (ARMadde tGPR:$Rn, tGPR:$Rm,
@@ -1292,6 +1292,7 @@
/// These opcodes will be converted to the real non-S opcodes by
/// AdjustInstrPostInstrSelection after giving then an optional CPSR operand.
let hasPostISelHook = 1, Defs = [CPSR] in {
+ let Uses = [CPSR] in
def tSBCS : tPseudoInst<(outs tGPR:$Rdn), (ins tGPR:$Rn, tGPR:$Rm),
2, IIC_iALUr,
[(set tGPR:$Rdn, CPSR, (ARMsube tGPR:$Rn, tGPR:$Rm,
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