[PATCH] D32293: InstructionSimplify: Simplify a shuffle with a undef mask to undef

[Davide Italiano via Phabricator via llvm-commits]

davide added inline comments.


================
Comment at: test/Transforms/InstSimplify/shufflevector.ll:113-119
 define <4 x i32> @undef_mask(<4 x i32> %x) {
 ; CHECK-LABEL: @undef_mask(
 ; CHECK-NEXT:    ret <4 x i32> undef
 ;
   %shuf = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> undef
   ret <4 x i32> %shuf
 }
----------------
zvi wrote:
> zvi wrote:
> > davide wrote:
> > > We have a similar case here, maybe it makes sense to handle them together?
> > Sorry i don't follow you. What do you mean by handling them together?
> > This case you are pointing out is handled by a more generic combine starting from DAGCombine.cpp:4154
> I actually meant InstructionSimplify.cpp:4154  :)
I was wondering how hard it would be to extend that combine to handle also this case.


Repository:
  rL LLVM

https://reviews.llvm.org/D32293