[PATCH] D32293: InstructionSimplify: Simplify a shuffle with a undef mask to undef

Zvi Rackover via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Apr 20 09:27:44 PDT 2017


zvi added a comment.

In https://reviews.llvm.org/D32293#732239, @davide wrote:

> Uhm, I don't follow you. Maybe DAGCombiner has a similar transformation, but instsimplify is powerful enough to handle the case I pointed out.


Sorry, what i really meant was InstructionSimplify.cpp:4154



================
Comment at: test/Transforms/InstSimplify/shufflevector.ll:113-119
 define <4 x i32> @undef_mask(<4 x i32> %x) {
 ; CHECK-LABEL: @undef_mask(
 ; CHECK-NEXT:    ret <4 x i32> undef
 ;
   %shuf = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> undef
   ret <4 x i32> %shuf
 }
----------------
zvi wrote:
> davide wrote:
> > We have a similar case here, maybe it makes sense to handle them together?
> Sorry i don't follow you. What do you mean by handling them together?
> This case you are pointing out is handled by a more generic combine starting from DAGCombine.cpp:4154
I actually meant InstructionSimplify.cpp:4154  :)


Repository:
  rL LLVM

https://reviews.llvm.org/D32293





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