[llvm] r300816 - Recommit "[APInt] Add back the asserts that check that the APInt shift methods aren't called with values larger than BitWidth."

[Craig Topper via llvm-commits]

Author: ctopper
Date: Wed Apr 19 22:49:18 2017
New Revision: 300816

URL: http://llvm.org/viewvc/llvm-project?rev=300816&view=rev
Log:
Recommit "[APInt] Add back the asserts that check that the APInt shift methods aren't called with values larger than BitWidth."

This includes a fix to clamp a right shift of larger than BitWidth in DAG combining.

Modified:
    llvm/trunk/include/llvm/ADT/APInt.h
    llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
    llvm/trunk/unittests/ADT/APIntTest.cpp

Modified: llvm/trunk/include/llvm/ADT/APInt.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/APInt.h?rev=300816&r1=300815&r2=300816&view=diff
==============================================================================
--- llvm/trunk/include/llvm/ADT/APInt.h (original)
+++ llvm/trunk/include/llvm/ADT/APInt.h Wed Apr 19 22:49:18 2017
@@ -847,8 +847,9 @@ public:
   ///
   /// \returns *this after shifting left by ShiftAmt
   APInt &operator<<=(unsigned ShiftAmt) {
+    assert(ShiftAmt <= BitWidth && "Invalid shift amount");
     if (isSingleWord()) {
-      if (ShiftAmt >= BitWidth)
+      if (ShiftAmt == BitWidth)
         VAL = 0;
       else
         VAL <<= ShiftAmt;
@@ -893,8 +894,9 @@ public:
 
   /// Logical right-shift this APInt by ShiftAmt in place.
   void lshrInPlace(unsigned ShiftAmt) {
+    assert(ShiftAmt <= BitWidth && "Invalid shift amount");
     if (isSingleWord()) {
-      if (ShiftAmt >= BitWidth)
+      if (ShiftAmt == BitWidth)
         VAL = 0;
       else
         VAL >>= ShiftAmt;

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=300816&r1=300815&r2=300816&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Wed Apr 19 22:49:18 2017
@@ -861,11 +861,12 @@ bool TargetLowering::SimplifyDemandedBit
             InnerOp.getOpcode() == ISD::SRL &&
             InnerOp.hasOneUse() &&
             isa<ConstantSDNode>(InnerOp.getOperand(1))) {
-          uint64_t InnerShAmt = cast<ConstantSDNode>(InnerOp.getOperand(1))
+          unsigned InnerShAmt = cast<ConstantSDNode>(InnerOp.getOperand(1))
             ->getZExtValue();
           if (InnerShAmt < ShAmt &&
               InnerShAmt < InnerBits &&
-              NewMask.lshr(InnerBits - InnerShAmt + ShAmt) == 0 &&
+              NewMask.lshr(std::min(InnerBits - InnerShAmt + ShAmt,
+                                    BitWidth)) == 0 &&
               NewMask.trunc(ShAmt) == 0) {
             SDValue NewSA =
               TLO.DAG.getConstant(ShAmt - InnerShAmt, dl,

Modified: llvm/trunk/unittests/ADT/APIntTest.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/unittests/ADT/APIntTest.cpp?rev=300816&r1=300815&r2=300816&view=diff
==============================================================================
--- llvm/trunk/unittests/ADT/APIntTest.cpp (original)
+++ llvm/trunk/unittests/ADT/APIntTest.cpp Wed Apr 19 22:49:18 2017
@@ -2021,7 +2021,7 @@ TEST(APIntTest, LogicalRightShift) {
 
   // Ensure we handle large shifts of multi-word.
   const APInt neg_one(128, static_cast<uint64_t>(-1), true);
-  EXPECT_EQ(0, neg_one.lshr(257));
+  EXPECT_EQ(0, neg_one.lshr(128));
 }
 
 TEST(APIntTest, LeftShift) {
@@ -2054,7 +2054,7 @@ TEST(APIntTest, LeftShift) {
 
   // Ensure we handle large shifts of multi-word.
   const APInt neg_one(128, static_cast<uint64_t>(-1), true);
-  EXPECT_EQ(0, neg_one.shl(257));
+  EXPECT_EQ(0, neg_one.shl(128));
 }
 
 } // end anonymous namespace