[PATCH] D31946: [legalize-types] Make softening result use a single map for replacements.

[Chih-Hung Hsieh via Phabricator via llvm-commits]

chh added a comment.

Maybe some problem with CopyToReg is fixed with new changes to SELECT,
but there are other errors I found from Android libm.
Please try the attached x.zip, which has three preprocessed files that
this new patch will fail to compile:

/tmp/cpowl-3f7b0a.c
-------------------

fatal error: error in backend: Cannot select: t5: f128 = fmul t2, t4

  t2: f128,ch = CopyFromReg t0, Register:f128 %vreg1
    t1: f128 = Register %vreg1
  t4: f128,ch = CopyFromReg t0, Register:f128 %vreg5
    t3: f128 = Register %vreg5

In function: cpowl

/tmp/ccosl-afde3f.c
-------------------

fatal error: error in backend: Cannot select: t53: f128 = fmul t51, t80

  t51: f128,ch,glue = CopyFromReg t50, Register:f128 %XMM0, t50:1
    t25: f128 = Register %XMM0
    t50: ch,glue = callseq_end t49, TargetConstant:i64<0>, TargetConstant:i64<0>, t49:1
      t23: i64 = TargetConstant<0>
      t23: i64 = TargetConstant<0>
      t49: ch,glue = X86ISD::CALL t47, TargetGlobalAddress:i64<fp128 (fp128)* @sinl> 0 [TF=6], Register:f128 %XMM0, RegisterMask:Untyped, t47:1
        t48: i64 = TargetGlobalAddress<fp128 (fp128)* @sinl> 0 [TF=6]
        t25: f128 = Register %XMM0
        t32: Untyped = RegisterMask
        t47: ch,glue = CopyToReg t46, Register:f128 %XMM0, t35
          t25: f128 = Register %XMM0
          t35: f128,ch = load<LD16[%9]> t34, FrameIndex:i64<-1>, undef:i64
            t3: i64 = FrameIndex<-1>
            t9: i64 = undef
  t80: f128,ch = load<LD16[%6](dereferenceable)> t50, FrameIndex:i64<2>, undef:i64
    t16: i64 = FrameIndex<2>
    t9: i64 = undef

In function: ccosl

/tmp/e_hypotl-9d5113.c
----------------------

fatal error: error in backend: Cannot select: t20: f128 = fmul t19, t19

  t19: f128,ch = CopyFromReg t0, Register:f128 %vreg32
    t18: f128 = Register %vreg32
  t19: f128,ch = CopyFromReg t0, Register:f128 %vreg32
    t18: f128 = Register %vreg32

In function: hypotl

I will be on vacation for about 1 week.
Probably won't be able to help you test new changes before I come back.

Please note that even if clang does not abort, like your test case show,
we should check if the output code actually put fp128 values in SSE registers
as before. It's not just an optimization but a required calling convention in
many cases.

F3236304: x.zip <https://reviews.llvm.org/F3236304>


https://reviews.llvm.org/D31946