[PATCH] D32220: [X86][SSE2] Fix asm string for movq (Move Quadword) instruction

[Zvi Rackover via Phabricator via llvm-commits]

zvi added a comment.

LGTM. Let Igor give the final ok.
Are the VEX/EVEX variants correct?



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Comment at: test/CodeGen/X86/vector-pcmp.ll:2
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
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Please remove this line


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Comment at: test/MC/X86/x86-64.s:1304
 
-// CHECK: movd %rdi, %xmm0
+// CHECK: movq %rdi, %xmm0
 // CHECK: encoding: [0x66,0x48,0x0f,0x6e,0xc7]
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Is this test-case a duplicate of the above?


https://reviews.llvm.org/D32220