[PATCH] D32232: [X86][MPX] Add load & store instructions of bnd values to getLoadStoreRegOpcode function

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: lib/Target/X86/X86InstrInfo.cpp:6611
+  case 16: 
+    if (X86::BNDRRegClass.hasSubClassEq(RC)) {
+      if (STI.is64Bit())
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Can you put this below the VR128X? VR128X is going to be more common so we should check for it first.


https://reviews.llvm.org/D32232