[PATCH] D31528: [ELF][MIPS] Multi-GOT implementation
Simon Atanasyan via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 18 09:47:02 PDT 2017
On Tue, Apr 18, 2017 at 2:49 AM, Sean Silva <chisophugis at gmail.com> wrote:
>
> Limited range for immediates is true for most RISC architectures. Why is
> MIPS so special here? What do other arches do?
As far as I know (I'm not an expert though) other RISC architectures
use either instructions with immediates longer than 16-bits or more
than one instruction to calculate GOT entry address.
--
Simon Atanasyan
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