[PATCH] D32098: [InstCombine] Use less bitwise operations to handle Instruction::SExt in SimplifyDemandedUseBits. Other improvements.
David Majnemer via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Apr 14 15:36:31 PDT 2017
majnemer added inline comments.
================
Comment at: lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp:437
+ // If the input sign bit is known zero, convert this into a zero extension.
+ if (InputKnownZero.isNegative()) {
// Convert to ZExt cast
----------------
Using isNegative on InputKnownZero is a little confusing because we are testing to see if the sign bit is clear.
https://reviews.llvm.org/D32098
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