[PATCH] D32039: PR31357 fix
Simon Pilgrim via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Apr 14 08:48:10 PDT 2017
RKSimon added a reviewer: spatel.
RKSimon added inline comments.
================
Comment at: lib/CodeGen/SelectionDAG/DAGCombiner.cpp:3887
+ ConstantSDNode *N1C = nullptr;
+ if (Opc == ISD::AND) {
+ N1C = dyn_cast<ConstantSDNode>(N.getOperand(1));
----------------
Remove braces (style)
================
Comment at: lib/CodeGen/SelectionDAG/DAGCombiner.cpp:3891
+ else if (Opc0 == ISD::AND) {
+ // SHL or SRL: look upstream for AND mask operand
+ N1C = dyn_cast<ConstantSDNode>(N0.getOperand(1));
----------------
Move this comment before the first if() - it seems to be common to both cases.
================
Comment at: test/CodeGen/X86/bswap_tree.ll:4
+; RUN: llc < %s -march=x86 -mcpu=i686 | FileCheck %s
+; RUN: llc < %s -march=x86-64 | FileCheck %s --check-prefix=CHECK64
+
----------------
Regenerate the codegen with llvm\utils\update_llc_test_checks.py
Also, lease use triples instead of arch/cpu:
```
; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s
; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=CHECK64
```
================
Comment at: test/CodeGen/X86/bswap_tree2.ll:5
+; RUN: llc < %s -march=x86-64 | FileCheck %s
+
+; Don't match a near-miss 32-bit packed halfword bswap
----------------
Regenerate the codegen with llvm\utils\update_llc_test_checks.py
Also, lease use triples instead of arch/cpu:
```
; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s
; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=CHECK64
```
https://reviews.llvm.org/D32039
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