[PATCH] D31993: [AMDGPU] Combine DS operations with offsets bigger than byte

[Valery Pykhtin via Phabricator via llvm-commits]

vpykhtin added inline comments.


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Comment at: lib/Target/AMDGPU/SILoadStoreOptimizer.cpp:78
+    unsigned Offset1;
+    unsigned BaseOff;
+    bool UseST64;
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rampitec wrote:
> vpykhtin wrote:
> > Why 3 offsets?
> Two offsets as it will be encoded into an LDS instruction, and then base offset which needs to be added with v_add_i32 to the pointer if non zero.
But one of it would become zero in the instruction?


Repository:
  rL LLVM

https://reviews.llvm.org/D31993