[llvm] r300091 - [SelectionDAG] Use APInt move assignment to avoid 2 memory allocations and copies when bit width is larger than 64-bits.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 12 11:39:27 PDT 2017
Author: ctopper
Date: Wed Apr 12 13:39:27 2017
New Revision: 300091
URL: http://llvm.org/viewvc/llvm-project?rev=300091&view=rev
Log:
[SelectionDAG] Use APInt move assignment to avoid 2 memory allocations and copies when bit width is larger than 64-bits.
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=300091&r1=300090&r2=300091&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Wed Apr 12 13:39:27 2017
@@ -731,8 +731,8 @@ bool TargetLowering::SimplifyDemandedBit
}
}
- KnownZero = KnownZeroOut;
- KnownOne = KnownOneOut;
+ KnownZero = std::move(KnownZeroOut);
+ KnownOne = std::move(KnownOneOut);
break;
case ISD::SELECT:
if (SimplifyDemandedBits(Op.getOperand(2), NewMask, KnownZero,
More information about the llvm-commits
mailing list