[llvm] r300067 - [InstCombine] morph an existing instruction instead of creating a new one
Sanjay Patel via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 12 08:11:33 PDT 2017
Author: spatel
Date: Wed Apr 12 10:11:33 2017
New Revision: 300067
URL: http://llvm.org/viewvc/llvm-project?rev=300067&view=rev
Log:
[InstCombine] morph an existing instruction instead of creating a new one
One potential way to make InstCombine (very slightly?) faster is to recycle instructions
when possible instead of creating new ones. It's not explicitly stated AFAIK, but we don't
consider this an "InstSimplify". We could, however, make a new layer to house transforms
like this if that makes InstCombine more manageable (just throwing out an idea; not sure
how much opportunity is actually here).
Differential Revision: https://reviews.llvm.org/D31863
Modified:
llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
llvm/trunk/test/Transforms/InstCombine/select-cmp-br.ll
llvm/trunk/test/Transforms/LoopVectorize/if-conversion.ll
llvm/trunk/test/Transforms/SimplifyCFG/merge-cond-stores.ll
Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp?rev=300067&r1=300066&r2=300067&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp (original)
+++ llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp Wed Apr 12 10:11:33 2017
@@ -2408,13 +2408,12 @@ Instruction *InstCombiner::visitXor(Bina
}
}
- if (Constant *RHS = dyn_cast<Constant>(Op1)) {
- if (RHS->isAllOnesValue() && Op0->hasOneUse())
- // xor (cmp A, B), true = not (cmp A, B) = !cmp A, B
- if (CmpInst *CI = dyn_cast<CmpInst>(Op0))
- return CmpInst::Create(CI->getOpcode(),
- CI->getInversePredicate(),
- CI->getOperand(0), CI->getOperand(1));
+ // xor (cmp A, B), true = not (cmp A, B) = !cmp A, B
+ ICmpInst::Predicate Pred;
+ if (match(Op0, m_OneUse(m_Cmp(Pred, m_Value(), m_Value()))) &&
+ match(Op1, m_AllOnes())) {
+ cast<CmpInst>(Op0)->setPredicate(CmpInst::getInversePredicate(Pred));
+ return replaceInstUsesWith(I, Op0);
}
if (ConstantInt *RHSC = dyn_cast<ConstantInt>(Op1)) {
Modified: llvm/trunk/test/Transforms/InstCombine/select-cmp-br.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/select-cmp-br.ll?rev=300067&r1=300066&r2=300067&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/select-cmp-br.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/select-cmp-br.ll Wed Apr 12 10:11:33 2017
@@ -15,8 +15,8 @@ define void @test1(%C* %arg) {
; CHECK-NEXT: [[M:%.*]] = load i64*, i64** [[TMP]], align 8
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[C]], %C* [[ARG]], i64 1, i32 0, i32 0
; CHECK-NEXT: [[N:%.*]] = load i64*, i64** [[TMP1]], align 8
-; CHECK-NEXT: [[TMP71:%.*]] = icmp eq %C* [[ARG]], null
; CHECK-NEXT: [[NOT_TMP5:%.*]] = icmp ne i64* [[M]], [[N]]
+; CHECK-NEXT: [[TMP71:%.*]] = icmp eq %C* [[ARG]], null
; CHECK-NEXT: [[TMP7:%.*]] = or i1 [[TMP71]], [[NOT_TMP5]]
; CHECK-NEXT: br i1 [[TMP7]], label [[BB10:%.*]], label [[BB8:%.*]]
; CHECK: bb:
@@ -115,8 +115,8 @@ define void @test3(%C* %arg) {
; CHECK-NEXT: [[M:%.*]] = load i64*, i64** [[TMP]], align 8
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[C]], %C* [[ARG]], i64 1, i32 0, i32 0
; CHECK-NEXT: [[N:%.*]] = load i64*, i64** [[TMP1]], align 8
-; CHECK-NEXT: [[TMP71:%.*]] = icmp eq %C* [[ARG]], null
; CHECK-NEXT: [[NOT_TMP5:%.*]] = icmp ne i64* [[M]], [[N]]
+; CHECK-NEXT: [[TMP71:%.*]] = icmp eq %C* [[ARG]], null
; CHECK-NEXT: [[TMP7:%.*]] = or i1 [[TMP71]], [[NOT_TMP5]]
; CHECK-NEXT: br i1 [[TMP7]], label [[BB10:%.*]], label [[BB8:%.*]]
; CHECK: bb:
Modified: llvm/trunk/test/Transforms/LoopVectorize/if-conversion.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopVectorize/if-conversion.ll?rev=300067&r1=300066&r2=300067&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/LoopVectorize/if-conversion.ll (original)
+++ llvm/trunk/test/Transforms/LoopVectorize/if-conversion.ll Wed Apr 12 10:11:33 2017
@@ -18,9 +18,9 @@ target datalayout = "e-p:64:64:64-i1:8:8
;CHECK-LABEL: @function0(
;CHECK: load <4 x i32>
+;CHECK: icmp sle <4 x i32>
;CHECK: mul <4 x i32>
;CHECK: add <4 x i32>
-;CHECK: icmp sle <4 x i32>
;CHECK: select <4 x i1>
;CHECK: ret i32
define i32 @function0(i32* nocapture %a, i32* nocapture %b, i32 %start, i32 %end) nounwind uwtable ssp {
@@ -71,8 +71,8 @@ for.end:
;CHECK-LABEL: @reduction_func(
;CHECK: load <4 x i32>
-;CHECK: add <4 x i32>
;CHECK: icmp slt <4 x i32>
+;CHECK: add <4 x i32>
;CHECK: select <4 x i1>
;CHECK: ret i32
define i32 @reduction_func(i32* nocapture %A, i32 %n) nounwind uwtable readonly ssp {
Modified: llvm/trunk/test/Transforms/SimplifyCFG/merge-cond-stores.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/SimplifyCFG/merge-cond-stores.ll?rev=300067&r1=300066&r2=300067&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/SimplifyCFG/merge-cond-stores.ll (original)
+++ llvm/trunk/test/Transforms/SimplifyCFG/merge-cond-stores.ll Wed Apr 12 10:11:33 2017
@@ -5,8 +5,8 @@
define void @test_simple(i32* %p, i32 %a, i32 %b) {
; CHECK-LABEL: @test_simple(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[X2:%.*]] = icmp eq i32 [[B:%.*]], 0
; CHECK-NEXT: [[TMP0:%.*]] = icmp ne i32 [[A:%.*]], 0
+; CHECK-NEXT: [[X2:%.*]] = icmp eq i32 [[B:%.*]], 0
; CHECK-NEXT: [[TMP1:%.*]] = xor i1 [[X2]], true
; CHECK-NEXT: [[TMP2:%.*]] = or i1 [[TMP0]], [[TMP1]]
; CHECK-NEXT: br i1 [[TMP2]], label [[TMP3:%.*]], label [[TMP4:%.*]]
@@ -43,8 +43,8 @@ define void @test_recursive(i32* %p, i32
; CHECK-NEXT: [[TMP0:%.*]] = or i32 [[B:%.*]], [[A:%.*]]
; CHECK-NEXT: [[X4:%.*]] = icmp eq i32 [[D:%.*]], 0
; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[TMP0]], [[C:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = xor i1 [[X4]], true
; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP1]], 0
+; CHECK-NEXT: [[TMP2:%.*]] = xor i1 [[X4]], true
; CHECK-NEXT: [[TMP4:%.*]] = or i1 [[TMP3]], [[TMP2]]
; CHECK-NEXT: br i1 [[TMP4]], label [[TMP5:%.*]], label [[TMP6:%.*]]
; CHECK: [[X3:%.*]] = icmp eq i32 [[C]], 0
More information about the llvm-commits
mailing list