[PATCH] D31944: [DAGCombiner] add (sext i1 X), 1 --> zext (not i1 X)

Sanjay Patel via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Apr 11 16:26:13 PDT 2017


spatel added inline comments.


================
Comment at: lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1885
+        N0.getOperand(0).getScalarValueSizeInBits() == 1 &&
+        isOneConstantOrOneSplatConstant(N1) && !LegalOperations) {
+      SDValue X = N0.getOperand(0);
----------------
arsenm wrote:
> !LegalOperations check first? Also why not check if the xor/zext are legal?
No good reason - just lazy. 

Although if we add the TLI checks, I don't think we can also hoist !LegalOps? I'll upload a new patch with the extra checks.


https://reviews.llvm.org/D31944





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