[llvm] r300000 - AMDGPU: Insert wait at start of callee functions
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 11 15:29:32 PDT 2017
Author: arsenm
Date: Tue Apr 11 17:29:31 2017
New Revision: 300000
URL: http://llvm.org/viewvc/llvm-project?rev=300000&view=rev
Log:
AMDGPU: Insert wait at start of callee functions
Added:
llvm/trunk/test/CodeGen/AMDGPU/insert-waits-callee.mir
Modified:
llvm/trunk/lib/Target/AMDGPU/SIInsertWaits.cpp
llvm/trunk/test/CodeGen/AMDGPU/hsa-func.ll
Modified: llvm/trunk/lib/Target/AMDGPU/SIInsertWaits.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/SIInsertWaits.cpp?rev=300000&r1=299999&r2=300000&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/SIInsertWaits.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/SIInsertWaits.cpp Tue Apr 11 17:29:31 2017
@@ -690,5 +690,19 @@ bool SIInsertWaits::runOnMachineFunction
for (MachineInstr *I : RemoveMI)
I->eraseFromParent();
+ if (!MFI->isEntryFunction()) {
+ // Wait for any outstanding memory operations that the input registers may
+ // depend on. We can't track them and it's better to to the wait after the
+ // costly call sequence.
+
+ // TODO: Could insert earlier and schedule more liberally with operations
+ // that only use caller preserved registers.
+ MachineBasicBlock &EntryBB = MF.front();
+ BuildMI(EntryBB, EntryBB.getFirstNonPHI(), DebugLoc(), TII->get(AMDGPU::S_WAITCNT))
+ .addImm(0);
+
+ Changes = true;
+ }
+
return Changes;
}
Modified: llvm/trunk/test/CodeGen/AMDGPU/hsa-func.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/hsa-func.ll?rev=300000&r1=299999&r2=300000&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/hsa-func.ll (original)
+++ llvm/trunk/test/CodeGen/AMDGPU/hsa-func.ll Tue Apr 11 17:29:31 2017
@@ -26,7 +26,7 @@
; ELF: Symbol {
; ELF: Name: simple
-; ELF: Size: 288
+; ELF: Size: 292
; ELF: Type: Function (0x2)
; ELF: }
Added: llvm/trunk/test/CodeGen/AMDGPU/insert-waits-callee.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/insert-waits-callee.mir?rev=300000&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/insert-waits-callee.mir (added)
+++ llvm/trunk/test/CodeGen/AMDGPU/insert-waits-callee.mir Tue Apr 11 17:29:31 2017
@@ -0,0 +1,25 @@
+# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=fiji -verify-machineinstrs -run-pass si-insert-waits -o - %s | FileCheck %s
+--- |
+ define float @entry_callee_wait(float %arg) #0 {
+ ret float %arg
+ }
+
+ attributes #0 = { nounwind }
+...
+---
+# CHECK-LABEL: name: entry_callee_wait{{$}}
+# CHECK: bb.0:
+# CHECK-NEXT: S_WAITCNT 0{{$}}
+# CHECK-NEXT: V_ADD_F32
+# CHECK-NEXT: S_SETPC_B64
+liveins:
+ - { reg: '%sgpr0_sgpr1' }
+ - { reg: '%vgpr0' }
+
+name: entry_callee_wait
+body: |
+ bb.0:
+ %vgpr0 = V_ADD_F32_e32 %vgpr0, %vgpr0, implicit %exec
+ S_SETPC_B64 killed %sgpr0_sgpr1
+
+...
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