[PATCH] D31955: MachineRegisterInfo: Add way to mark individual registers as used

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Apr 11 12:48:04 PDT 2017


arsenm created this revision.
Herald added subscribers: tpr, wdng.

There is already a way to add phys reg uses from a regmask,
but not for a single register.

      

This will help avoid fragile special handling in AMDGPU
reserved register compaction code in the prolog handling.


https://reviews.llvm.org/D31955

Files:
  include/llvm/CodeGen/MachineRegisterInfo.h


Index: include/llvm/CodeGen/MachineRegisterInfo.h
===================================================================
--- include/llvm/CodeGen/MachineRegisterInfo.h
+++ include/llvm/CodeGen/MachineRegisterInfo.h
@@ -760,6 +760,13 @@
     UsedPhysRegMask.setBitsNotInMask(RegMask);
   }
 
+  /// Mark \p Reg and any aliases of it as used.
+  void addPhysRegUsed(const TargetRegisterInfo &TRI, unsigned Reg) {
+    MCRegAliasIterator R(Reg, &TRI, true);
+    for (; R.isValid(); ++R)
+      UsedPhysRegMask.set(*R);
+  }
+
   const BitVector &getUsedPhysRegsMask() const { return UsedPhysRegMask; }
 
   //===--------------------------------------------------------------------===//


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D31955.94876.patch
Type: text/x-patch
Size: 681 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20170411/d043dfa0/attachment.bin>


More information about the llvm-commits mailing list