[PATCH] D31589: [AMDGPU] Add A5 to data layout for amdgiz environment

[Yaxun Liu via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL299964: [AMDGPU] Add A5 to data layout for amdgiz environment (authored by yaxunl).

Changed prior to commit:
  https://reviews.llvm.org/D31589?vs=93821&id=94854#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D31589

Files:
  llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
  llvm/trunk/test/CodeGen/AMDGPU/env-amdgiz.ll
  llvm/trunk/test/CodeGen/AMDGPU/env-amdgizcl.ll


Index: llvm/trunk/test/CodeGen/AMDGPU/env-amdgizcl.ll
===================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/env-amdgizcl.ll
+++ llvm/trunk/test/CodeGen/AMDGPU/env-amdgizcl.ll
@@ -1,7 +1,7 @@
 ; RUN: llc -march=amdgcn -mtriple=amdgcn-amd-amdhsa-amdgizcl -verify-machineinstrs < %s
 ; Just check the target feature and data layout is accepted without error.
 
-target datalayout = "e-p:64:64-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64"
+target datalayout = "e-p:64:64-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-A5"
 target triple = "amdgcn-amd-amdhsa-amdgizcl"
 
 define void @foo() {
Index: llvm/trunk/test/CodeGen/AMDGPU/env-amdgiz.ll
===================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/env-amdgiz.ll
+++ llvm/trunk/test/CodeGen/AMDGPU/env-amdgiz.ll
@@ -1,7 +1,7 @@
 ; RUN: llc -march=amdgcn -mtriple=amdgcn-amd-amdhsa-amdgiz -verify-machineinstrs < %s
 ; Just check the target feature and data layout is accepted without error.
 
-target datalayout = "e-p:64:64-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64"
+target datalayout = "e-p:64:64-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-A5"
 target triple = "amdgcn-amd-amdhsa-amdgiz"
 
 define void @foo() {
Index: llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
===================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
@@ -214,7 +214,7 @@
       TT.getEnvironmentName() == "amdgizcl")
     return "e-p:64:64-p1:64:64-p2:64:64-p3:32:32-p4:32:32-p5:32:32"
          "-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128"
-         "-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64";
+         "-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-A5";
   return "e-p:32:32-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32"
       "-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128"
       "-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64";


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