[PATCH] D31793: [AArch64] Allow global register asm("x18") or asm("w18") under -ffixed-x18

Petr Hosek via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Apr 10 11:06:29 PDT 2017


This revision was automatically updated to reflect the committed changes.
Closed by commit rL299799: [AArch64] Allow global register asm("x18") or asm("w18") under -ffixed-x18 (authored by phosek).

Changed prior to commit:
  https://reviews.llvm.org/D31793?vs=94452&id=94564#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D31793

Files:
  llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/trunk/test/CodeGen/AArch64/aarch64-named-reg-w18.ll
  llvm/trunk/test/CodeGen/AArch64/aarch64-named-reg-x18.ll


Index: llvm/trunk/test/CodeGen/AArch64/aarch64-named-reg-x18.ll
===================================================================
--- llvm/trunk/test/CodeGen/AArch64/aarch64-named-reg-x18.ll
+++ llvm/trunk/test/CodeGen/AArch64/aarch64-named-reg-x18.ll
@@ -0,0 +1,14 @@
+; RUN: not llc -mtriple=aarch64-fuchsia -o - %s 2>&1 | FileCheck %s --check-prefix=ERROR
+; RUN: llc -mtriple=aarch64-fuchsia -mattr=+reserve-x18 -o - %s
+
+define void @set_x18(i64 %x) {
+entry:
+; FIXME: Include an allocatable-specific error message
+; ERROR: Invalid register name "x18".
+  tail call void @llvm.write_register.i64(metadata !0, i64 %x)
+  ret void
+}
+
+declare void @llvm.write_register.i64(metadata, i64) nounwind
+
+!0 = !{!"x18"}
Index: llvm/trunk/test/CodeGen/AArch64/aarch64-named-reg-w18.ll
===================================================================
--- llvm/trunk/test/CodeGen/AArch64/aarch64-named-reg-w18.ll
+++ llvm/trunk/test/CodeGen/AArch64/aarch64-named-reg-w18.ll
@@ -0,0 +1,14 @@
+; RUN: not llc -mtriple=aarch64-fuchsia -o - %s 2>&1 | FileCheck %s --check-prefix=ERROR
+; RUN: llc -mtriple=aarch64-fuchsia -mattr=+reserve-x18 -o - %s
+
+define void @set_w18(i32 %x) {
+entry:
+; FIXME: Include an allocatable-specific error message
+; ERROR: Invalid register name "w18".
+  tail call void @llvm.write_register.i32(metadata !0, i32 %x)
+  ret void
+}
+
+declare void @llvm.write_register.i32(metadata, i32) nounwind
+
+!0 = !{!"w18"}
Index: llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
===================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -4510,7 +4510,12 @@
                                                   SelectionDAG &DAG) const {
   unsigned Reg = StringSwitch<unsigned>(RegName)
                        .Case("sp", AArch64::SP)
+                       .Case("x18", AArch64::X18)
+                       .Case("w18", AArch64::W18)
                        .Default(0);
+  if ((Reg == AArch64::X18 || Reg == AArch64::W18) &&
+      !Subtarget->isX18Reserved())
+    Reg = 0;
   if (Reg)
     return Reg;
   report_fatal_error(Twine("Invalid register name \""


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