[llvm] r299852 - [X86][MMX] Add fast-isel support for MMX non-temporal writes

[Simon Pilgrim via llvm-commits]

Author: rksimon
Date: Mon Apr 10 11:58:07 2017
New Revision: 299852

URL: http://llvm.org/viewvc/llvm-project?rev=299852&view=rev
Log:
[X86][MMX] Add fast-isel support for MMX non-temporal writes

Differential Revision: https://reviews.llvm.org/D31754

Modified:
    llvm/trunk/lib/Target/X86/X86FastISel.cpp
    llvm/trunk/test/CodeGen/X86/fast-isel-nontemporal.ll

Modified: llvm/trunk/lib/Target/X86/X86FastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FastISel.cpp?rev=299852&r1=299851&r2=299852&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86FastISel.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86FastISel.cpp Mon Apr 10 11:58:07 2017
@@ -528,6 +528,7 @@ bool X86FastISel::X86FastEmitLoad(EVT VT
 bool X86FastISel::X86FastEmitStore(EVT VT, unsigned ValReg, bool ValIsKill,
                                    X86AddressMode &AM,
                                    MachineMemOperand *MMO, bool Aligned) {
+  bool HasSSE1 = Subtarget->hasSSE1();
   bool HasSSE2 = Subtarget->hasSSE2();
   bool HasSSE4A = Subtarget->hasSSE4A();
   bool HasAVX = Subtarget->hasAVX();
@@ -588,6 +589,9 @@ bool X86FastISel::X86FastEmitStore(EVT V
     } else
       Opc = X86::ST_Fp64m;
     break;
+  case MVT::x86mmx:
+    Opc = (IsNonTemporal && HasSSE1) ? X86::MMX_MOVNTQmr : X86::MMX_MOVQ64mr;
+    break;
   case MVT::v4f32:
     if (Aligned) {
       if (IsNonTemporal)

Modified: llvm/trunk/test/CodeGen/X86/fast-isel-nontemporal.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fast-isel-nontemporal.ll?rev=299852&r1=299851&r2=299852&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fast-isel-nontemporal.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fast-isel-nontemporal.ll Mon Apr 10 11:58:07 2017
@@ -100,7 +100,7 @@ define void @test_mmx(x86_mmx* nocapture
 ; ALL:       # BB#0: # %entry
 ; ALL-NEXT:    movq (%rdi), %mm0
 ; ALL-NEXT:    psrlq $3, %mm0
-; ALL-NEXT:    movq %mm0, (%rsi)
+; ALL-NEXT:    movntq %mm0, (%rsi)
 ; ALL-NEXT:    retq
 entry:
   %0 = load x86_mmx, x86_mmx* %a0