[llvm] r299820 - [InstCombine] Add test cases to show missing support for vectors in an OR combine. Also add the commuted versions. NFC
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Sat Apr 8 23:12:37 PDT 2017
Author: ctopper
Date: Sun Apr 9 01:12:36 2017
New Revision: 299820
URL: http://llvm.org/viewvc/llvm-project?rev=299820&view=rev
Log:
[InstCombine] Add test cases to show missing support for vectors in an OR combine. Also add the commuted versions. NFC
Modified:
llvm/trunk/test/Transforms/InstCombine/and.ll
Modified: llvm/trunk/test/Transforms/InstCombine/and.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/and.ll?rev=299820&r1=299819&r2=299820&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/and.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/and.ll Sun Apr 9 01:12:36 2017
@@ -417,6 +417,48 @@ define i32 @test33(i32 %b) {
ret i32 %tmp.13
}
+define i32 @test33b(i32 %b) {
+; CHECK-LABEL: @test33b(
+; CHECK-NEXT: [[TMP_13:%.*]] = xor i32 [[B:%.*]], 1
+; CHECK-NEXT: ret i32 [[TMP_13]]
+;
+ %tmp.4.mask = and i32 %b, 1
+ %tmp.10 = xor i32 %tmp.4.mask, 1
+ %tmp.12 = and i32 %b, -2
+ %tmp.13 = or i32 %tmp.10, %tmp.12
+ ret i32 %tmp.13
+}
+
+define <2 x i32> @test33vec(<2 x i32> %b) {
+; CHECK-LABEL: @test33vec(
+; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i32> [[B:%.*]], <i32 1, i32 1>
+; CHECK-NEXT: [[TMP_10:%.*]] = and <2 x i32> [[TMP1]], <i32 1, i32 1>
+; CHECK-NEXT: [[TMP_12:%.*]] = and <2 x i32> [[B]], <i32 -2, i32 -2>
+; CHECK-NEXT: [[TMP_13:%.*]] = or <2 x i32> [[TMP_12]], [[TMP_10]]
+; CHECK-NEXT: ret <2 x i32> [[TMP_13]]
+;
+ %tmp.4.mask = and <2 x i32> %b, <i32 1, i32 1>
+ %tmp.10 = xor <2 x i32> %tmp.4.mask, <i32 1, i32 1>
+ %tmp.12 = and <2 x i32> %b, <i32 -2, i32 -2>
+ %tmp.13 = or <2 x i32> %tmp.12, %tmp.10
+ ret <2 x i32> %tmp.13
+}
+
+define <2 x i32> @test33vecb(<2 x i32> %b) {
+; CHECK-LABEL: @test33vecb(
+; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i32> [[B:%.*]], <i32 1, i32 1>
+; CHECK-NEXT: [[TMP_10:%.*]] = and <2 x i32> [[TMP1]], <i32 1, i32 1>
+; CHECK-NEXT: [[TMP_12:%.*]] = and <2 x i32> [[B]], <i32 -2, i32 -2>
+; CHECK-NEXT: [[TMP_13:%.*]] = or <2 x i32> [[TMP_10]], [[TMP_12]]
+; CHECK-NEXT: ret <2 x i32> [[TMP_13]]
+;
+ %tmp.4.mask = and <2 x i32> %b, <i32 1, i32 1>
+ %tmp.10 = xor <2 x i32> %tmp.4.mask, <i32 1, i32 1>
+ %tmp.12 = and <2 x i32> %b, <i32 -2, i32 -2>
+ %tmp.13 = or <2 x i32> %tmp.10, %tmp.12
+ ret <2 x i32> %tmp.13
+}
+
define i32 @test34(i32 %A, i32 %B) {
; CHECK-LABEL: @test34(
; CHECK-NEXT: ret i32 %B
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