[PATCH] D31783: Move size and alignment information of regclass to TargetRegisterInfo
Krzysztof Parzyszek via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Apr 6 12:33:06 PDT 2017
kparzysz created this revision.
Herald added subscribers: nhaehnle, wdng, nemanjai, jholewinski.
Herald added a reviewer: javed.absar.
1. Split RegisterClass::getSize() into two functions:
- TargetRegisterInfo::getRegSize(const TargetRegisterClass *RC) const;
- TargetRegisterInfo::getSpillSize(const TargetRegisterClass *RC) const;
2. Replace RegisterClass::getAlignment() with:
- TargetRegisterInfo::getSpillAlignment(const TargetRegisterClass *RC) const;
This will allow making those values depend on subtarget features in the future.
Repository:
rL LLVM
https://reviews.llvm.org/D31783
Files:
include/llvm/Target/TargetRegisterInfo.h
lib/CodeGen/AsmPrinter/DwarfExpression.cpp
lib/CodeGen/GlobalISel/InstructionSelect.cpp
lib/CodeGen/GlobalISel/RegisterBank.cpp
lib/CodeGen/GlobalISel/RegisterBankInfo.cpp
lib/CodeGen/PrologEpilogInserter.cpp
lib/CodeGen/RegAllocFast.cpp
lib/CodeGen/RegisterScavenging.cpp
lib/CodeGen/StackMaps.cpp
lib/CodeGen/TargetInstrInfo.cpp
lib/CodeGen/TargetLoweringBase.cpp
lib/CodeGen/TargetRegisterInfo.cpp
lib/CodeGen/VirtRegMap.cpp
lib/Target/AArch64/AArch64FrameLowering.cpp
lib/Target/AArch64/AArch64InstrInfo.cpp
lib/Target/AMDGPU/GCNRegPressure.cpp
lib/Target/AMDGPU/SIFrameLowering.cpp
lib/Target/AMDGPU/SIISelLowering.cpp
lib/Target/AMDGPU/SIInsertWaits.cpp
lib/Target/AMDGPU/SIInstrInfo.cpp
lib/Target/AMDGPU/SIInstrInfo.h
lib/Target/AMDGPU/SIRegisterInfo.cpp
lib/Target/ARM/ARMBaseInstrInfo.cpp
lib/Target/ARM/ARMBaseRegisterInfo.cpp
lib/Target/ARM/ARMFrameLowering.cpp
lib/Target/Hexagon/BitTracker.cpp
lib/Target/Hexagon/HexagonAsmPrinter.cpp
lib/Target/Hexagon/HexagonBitSimplify.cpp
lib/Target/Hexagon/HexagonExpandCondsets.cpp
lib/Target/Hexagon/HexagonFrameLowering.cpp
lib/Target/Mips/MipsAsmPrinter.cpp
lib/Target/Mips/MipsFrameLowering.cpp
lib/Target/Mips/MipsMachineFunction.cpp
lib/Target/Mips/MipsSEFrameLowering.cpp
lib/Target/Mips/MipsSEInstrInfo.cpp
lib/Target/NVPTX/NVPTXInstrInfo.cpp
lib/Target/PowerPC/PPCFrameLowering.cpp
lib/Target/SystemZ/SystemZInstrInfo.cpp
lib/Target/X86/X86FastISel.cpp
lib/Target/X86/X86FrameLowering.cpp
lib/Target/X86/X86InstrInfo.cpp
lib/Target/X86/X86RegisterInfo.cpp
lib/Target/XCore/XCoreFrameLowering.cpp
lib/Target/XCore/XCoreMachineFunctionInfo.cpp
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D31783.94416.patch
Type: text/x-patch
Size: 63080 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20170406/ca411c68/attachment.bin>
More information about the llvm-commits
mailing list