[llvm] r299620 - [IR] Add commutable matchers for Add and Mul to go with the logic operations that are already present. NFC
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 5 21:02:34 PDT 2017
Author: ctopper
Date: Wed Apr 5 23:02:33 2017
New Revision: 299620
URL: http://llvm.org/viewvc/llvm-project?rev=299620&view=rev
Log:
[IR] Add commutable matchers for Add and Mul to go with the logic operations that are already present. NFC
Modified:
llvm/trunk/include/llvm/IR/PatternMatch.h
Modified: llvm/trunk/include/llvm/IR/PatternMatch.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/IR/PatternMatch.h?rev=299620&r1=299619&r2=299620&view=diff
==============================================================================
--- llvm/trunk/include/llvm/IR/PatternMatch.h (original)
+++ llvm/trunk/include/llvm/IR/PatternMatch.h Wed Apr 5 23:02:33 2017
@@ -1357,6 +1357,22 @@ m_c_ICmp(ICmpInst::Predicate &Pred, cons
return m_CombineOr(m_ICmp(Pred, L, R), m_ICmp(Pred, R, L));
}
+/// \brief Matches a Add with LHS and RHS in either order.
+template<typename LHS, typename RHS>
+inline match_combine_or<BinaryOp_match<LHS, RHS, Instruction::Add>,
+ BinaryOp_match<RHS, LHS, Instruction::Add>>
+m_c_Add(const LHS &L, const RHS &R) {
+ return m_CombineOr(m_Add(L, R), m_Add(R, L));
+}
+
+/// \brief Matches a Mul with LHS and RHS in either order.
+template<typename LHS, typename RHS>
+inline match_combine_or<BinaryOp_match<LHS, RHS, Instruction::Mul>,
+ BinaryOp_match<RHS, LHS, Instruction::Mul>>
+m_c_Mul(const LHS &L, const RHS &R) {
+ return m_CombineOr(m_Mul(L, R), m_Mul(R, L));
+}
+
/// \brief Matches an And with LHS and RHS in either order.
template<typename LHS, typename RHS>
inline match_combine_or<BinaryOp_match<LHS, RHS, Instruction::And>,
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