[PATCH] D31161: [AMDGPU] New Waitcnt Insertion Pass

[Tony Tye via Phabricator via llvm-commits]

t-tye added inline comments.


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Comment at: lib/Target/AMDGPU/SIInsertWaitcnts.cpp:423
+  }
+  // TODO: Handle TTMP
+  // else if (TRI->isTTMP(MRIA, Reg.getReg())) ...
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Could M0, EXEC, etc. also potentially be a source or dest for SMEM and VMEM load/store?

Perhaps add an assert to ensure they never happen.


https://reviews.llvm.org/D31161