[PATCH] D31610: [InstCombine] Support folding and/or/xor with a constant vector RHS into selects and phis
Sanjay Patel via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 4 13:25:54 PDT 2017
spatel accepted this revision.
spatel added a comment.
This revision is now accepted and ready to land.
LGTM. It would be nice to hoist transforms that are common to all of the bitwise logic ops into a shared helper as an NFC follow-up, so we're not duplicating code. We have something like that for the shift instructions.
https://reviews.llvm.org/D31610
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