[PATCH] D30579: [mips][msa] Fix generation of bmn?zi and bins[lr]i instructions

[Simon Dardis via Phabricator via llvm-commits]

sdardis accepted this revision.
sdardis added a comment.
This revision is now accepted and ready to land.

Some comments inlined. https://reviews.llvm.org/rL297457 lifted the restriction on splat values being restricted to signed 10 bit values.

LGTM.



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Comment at: test/CodeGen/Mips/msa/bmzi_bmnzi.ll:19
+}
+; CHECK: llvm_mips_bmnzi_b_test:
+; CHECK: lw [[R0:\$[0-9]+]], %got(llvm_mips_bmnzi_b_RES)(
----------------
This should be CHECK-LABEL:


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Comment at: test/CodeGen/Mips/msa/bmzi_bmnzi.ll:42
+}
+; CHECK: llvm_mips_bmzi_b_test:
+; CHECK: lw [[R0:\$[0-9]+]], %got(llvm_mips_bmnzi_b_RES)(
----------------
This should be CHECK-LABEL:


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Comment at: test/CodeGen/Mips/msa/i5-b.ll:117
   %1 = load <8 x i16>, <8 x i16>* @llvm_mips_binsli_h_ARG2
-  %2 = tail call <8 x i16> @llvm.mips.binsli.h(<8 x i16> %0, <8 x i16> %1, i32 7)
   store <8 x i16> %2, <8 x i16>* @llvm_mips_binsli_h_RES
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Unnecessary change. For the bins[lr]i.[hwd] cases, you don't need to modify the test cases. The .b cases need to be changed as otherwise the entire element gets selected and this gets optimized out.


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Comment at: test/CodeGen/Mips/msa/immediates.ll:619
   %b = load <8 x i16>, <8 x i16> * %ptr2, align 16
-  %r = call <8 x i16> @llvm.mips.binsri.h(<8 x i16> %a, <8 x i16> %b, i32 15)
   store <8 x i16> %r, <8 x i16> * %ptr, align 16
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This appears to the only line that requires changing in this test. The others are unnecessary.


https://reviews.llvm.org/D30579