[llvm] r299121 - [InstSimplify] Use m_SignBit instead of calling getSignBit and using m_Specific. NFCI

[Sanjay Patel via llvm-commits]

I did add vector tests with:
https://reviews.llvm.org/rL295573
...so at least we have good tests. Thanks for cleaning up the code.

On Thu, Mar 30, 2017 at 4:50 PM, Friedman, Eli via llvm-commits <
llvm-commits at lists.llvm.org> wrote:

> Oh, you're right.  Nevermind.
>
> -Eli
>
>
> On 3/30/2017 3:46 PM, Craig Topper wrote:
>
> If Ty is a vector type wasn't that ConstantInt::get in the original code
> going to create a splat of the Constant?
>
> ~Craig
>
> On Thu, Mar 30, 2017 at 3:44 PM, Friedman, Eli <efriedma at codeaurora.org>
> wrote:
>
>> On 3/30/2017 3:21 PM, Craig Topper via llvm-commits wrote:
>>
>>> Author: ctopper
>>> Date: Thu Mar 30 17:21:16 2017
>>> New Revision: 299121
>>>
>>> URL: http://llvm.org/viewvc/llvm-project?rev=299121&view=rev
>>> Log:
>>> [InstSimplify] Use m_SignBit instead of calling getSignBit and using
>>> m_Specific. NFCI
>>>
>>> Modified:
>>>      llvm/trunk/lib/Analysis/InstructionSimplify.cpp
>>>
>>> Modified: llvm/trunk/lib/Analysis/InstructionSimplify.cpp
>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/
>>> InstructionSimplify.cpp?rev=299121&r1=299120&r2=299121&view=diff
>>> ============================================================
>>> ==================
>>> --- llvm/trunk/lib/Analysis/InstructionSimplify.cpp (original)
>>> +++ llvm/trunk/lib/Analysis/InstructionSimplify.cpp Thu Mar 30 17:21:16
>>> 2017
>>> @@ -565,10 +565,8 @@ static Value *SimplifyAddInst(Value *Op0
>>>     // add nsw/nuw (xor Y, signbit), signbit --> Y
>>>     // The no-wrapping add guarantees that the top bit will be set by
>>> the add.
>>>     // Therefore, the xor must be clearing the already set sign bit of Y.
>>> -  Constant *SignBit =
>>> -      ConstantInt::get(Ty, APInt::getSignBit(Ty->getScala
>>> rSizeInBits()));
>>> -  if ((isNSW || isNUW) && match(Op1, m_Specific(SignBit)) &&
>>> -      match(Op0, m_Xor(m_Value(Y), m_Specific(SignBit))))
>>> +  if ((isNSW || isNUW) && match(Op1, m_SignBit()) &&
>>> +      match(Op0, m_Xor(m_Value(Y), m_SignBit())))
>>>       return Y;
>>>
>>>
>>
>> Are you certain there's no functional change here?  m_SignBit() also
>> matches vectors.
>>
>> -Eli
>>
>> --
>> Employee of Qualcomm Innovation Center, Inc.
>> Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a
>> Linux Foundation Collaborative Project
>>
>>
>
>
> --
> Employee of Qualcomm Innovation Center, Inc.
> Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project
>
>
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