[PATCH] D30744: Improve machine schedulers for in-order processors

[Javed Absar via Phabricator via llvm-commits]

javed.absar updated this revision to Diff 93068.
javed.absar added a comment.

Thanks Andrew. OK, I have added back 'SingleIssue' as syntactic sugar, but not in model, as recommended (if I got you right).
Best Regards, Javed.


https://reviews.llvm.org/D30744

Files:
  include/llvm/CodeGen/TargetSchedule.h
  include/llvm/Target/TargetSchedule.td
  lib/CodeGen/MachineScheduler.cpp
  lib/CodeGen/TargetSchedule.cpp
  lib/Target/ARM/ARMScheduleR52.td
  test/CodeGen/ARM/single-issue-r52.mir
  utils/TableGen/SubtargetEmitter.cpp

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