[PATCH] D31161: [AMDGPU] New Waitcnt Insertion Pass
Kannan Narayanan via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sat Mar 25 17:28:26 PDT 2017
kanarayan updated this revision to Diff 93059.
kanarayan added a comment.
1. Rename SI_RETURN to SI_RETURN_TO_EPILOG to reflect recent change.
2. Condition the nop insertion to break soft clauses on isXNACKEnabled(). Add a note to also condition this code on hasSoftClauses when that code is put back.
3. Fix tests added since last patch to reflect the new pass.
4. Remove experimental code.
https://reviews.llvm.org/D31161
Files:
lib/Target/AMDGPU/AMDGPU.h
lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
lib/Target/AMDGPU/CMakeLists.txt
lib/Target/AMDGPU/SIInsertWaitcnts.cpp
test/CodeGen/AMDGPU/basic-branch.ll
test/CodeGen/AMDGPU/branch-condition-and.ll
test/CodeGen/AMDGPU/branch-relaxation.ll
test/CodeGen/AMDGPU/control-flow-fastregalloc.ll
test/CodeGen/AMDGPU/indirect-addressing-si.ll
test/CodeGen/AMDGPU/infinite-loop.ll
test/CodeGen/AMDGPU/llvm.amdgcn.buffer.store.format.ll
test/CodeGen/AMDGPU/llvm.amdgcn.buffer.store.ll
test/CodeGen/AMDGPU/llvm.amdgcn.image.ll
test/CodeGen/AMDGPU/llvm.amdgcn.s.dcache.inv.ll
test/CodeGen/AMDGPU/llvm.amdgcn.s.dcache.inv.vol.ll
test/CodeGen/AMDGPU/llvm.amdgcn.s.dcache.wb.ll
test/CodeGen/AMDGPU/llvm.amdgcn.s.dcache.wb.vol.ll
test/CodeGen/AMDGPU/llvm.amdgcn.s.waitcnt.ll
test/CodeGen/AMDGPU/multi-divergent-exit-region.ll
test/CodeGen/AMDGPU/ret_jump.ll
test/CodeGen/AMDGPU/si-lower-control-flow-unreachable-block.ll
test/CodeGen/AMDGPU/smrd-vccz-bug.ll
test/CodeGen/AMDGPU/spill-m0.ll
test/CodeGen/AMDGPU/valu-i1.ll
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