[llvm] r298758 - [AMDGPU] Switch data layout by triple environment amdgiz

Yaxun Liu via llvm-commits llvm-commits at lists.llvm.org
Fri Mar 24 19:05:44 PDT 2017


Author: yaxunl
Date: Fri Mar 24 21:05:44 2017
New Revision: 298758

URL: http://llvm.org/viewvc/llvm-project?rev=298758&view=rev
Log:
[AMDGPU] Switch data layout by triple environment amdgiz

Switch data layout by target triple environment amdgiz and amdgizcl indicating using of an address space mapping in which generic address space is 0.

amdgiz is for non-OpenCL environment where generic address space is 0.

amdgizcl is for OpenCL environment where generic address space is 0.

Differential Revision: https://reviews.llvm.org/D31211

Added:
    llvm/trunk/test/CodeGen/AMDGPU/env-amdgiz.ll
    llvm/trunk/test/CodeGen/AMDGPU/env-amdgizcl.ll
Modified:
    llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp

Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp?rev=298758&r1=298757&r2=298758&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp Fri Mar 24 21:05:44 2017
@@ -203,9 +203,14 @@ static StringRef computeDataLayout(const
 
   // 32-bit private, local, and region pointers. 64-bit global, constant and
   // flat.
-  return "e-p:32:32-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32"
+  if (TT.getEnvironmentName() == "amdgiz" ||
+      TT.getEnvironmentName() == "amdgizcl")
+    return "e-p:64:64-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32"
          "-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128"
          "-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64";
+  return "e-p:32:32-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32"
+      "-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128"
+      "-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64";
 }
 
 LLVM_READNONE

Added: llvm/trunk/test/CodeGen/AMDGPU/env-amdgiz.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/env-amdgiz.ll?rev=298758&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/env-amdgiz.ll (added)
+++ llvm/trunk/test/CodeGen/AMDGPU/env-amdgiz.ll Fri Mar 24 21:05:44 2017
@@ -0,0 +1,11 @@
+; RUN: llc -march=amdgcn -mtriple=amdgcn-amd-amdhsa-amdgiz -verify-machineinstrs < %s
+; Just check the target feature and data layout is accepted without error.
+
+target datalayout = "e-p:64:64-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64"
+target triple = "amdgcn-amd-amdhsa-amdgiz"
+
+define void @foo() {
+entry:
+  ret void
+}
+

Added: llvm/trunk/test/CodeGen/AMDGPU/env-amdgizcl.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/env-amdgizcl.ll?rev=298758&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/env-amdgizcl.ll (added)
+++ llvm/trunk/test/CodeGen/AMDGPU/env-amdgizcl.ll Fri Mar 24 21:05:44 2017
@@ -0,0 +1,11 @@
+; RUN: llc -march=amdgcn -mtriple=amdgcn-amd-amdhsa-amdgizcl -verify-machineinstrs < %s
+; Just check the target feature and data layout is accepted without error.
+
+target datalayout = "e-p:64:64-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64"
+target triple = "amdgcn-amd-amdhsa-amdgizcl"
+
+define void @foo() {
+entry:
+  ret void
+}
+




More information about the llvm-commits mailing list