[PATCH] D31347: [X86][SSE] Generalised CMP+AND1 combine to ZERO/ALLBITS+MASK

Sanjay Patel via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Mar 24 14:43:25 PDT 2017


spatel added inline comments.


================
Comment at: lib/Target/X86/X86ISelLowering.cpp:31382-31383
+/// shift-right to eliminate loading the vector constant mask value.
+static SDValue combinePCMPAndMask(SDNode *N, SelectionDAG &DAG,
+                                  const X86Subtarget &Subtarget) {
   SDValue Op0 = peekThroughBitcasts(N->getOperand(0));
----------------
There's no PCMP dependency now, so "combineAndMaskToShift()"?


================
Comment at: test/CodeGen/X86/combine-and.ll:256-257
 ; CHECK:       # BB#0:
 ; CHECK-NEXT:    psraw $15, %xmm0
-; CHECK-NEXT:    pand {{.*}}(%rip), %xmm0
+; CHECK-NEXT:    psrlw $15, %xmm0
 ; CHECK-NEXT:    retq
----------------
We should be able to remove the psraw here?


Repository:
  rL LLVM

https://reviews.llvm.org/D31347





More information about the llvm-commits mailing list