[PATCH] D31299: Move spill size and alignment info from MC to TargetRegisterInfo
Krzysztof Parzyszek via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Mar 23 15:52:14 PDT 2017
kparzysz added inline comments.
================
Comment at: include/llvm/Target/TargetRegisterInfo.h:98
/// of a stack slot allocated to hold a spilled copy of this register.
- unsigned getSize() const { return MC->getSize(); }
+ unsigned getSize() const { return SpillSize; }
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MatzeB wrote:
> How hard would it be to rename this to getSpillSize() to avoid confusing?
> We can however do that in a separate patch.
That would be easy. However there are some places where this function is called with the intent of getting the register size. AMDGPU and Hexagon both have places like that. I'd like to add the register size as a separate field here, but I'm getting close to completing the first version of the variable class patch which already adds that.
Repository:
rL LLVM
https://reviews.llvm.org/D31299
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