[PATCH] D31113: [AArch64] Add new subtarget feature to fold LSL into address mode.

[Chad Rosier via Phabricator via llvm-commits]

mcrosier added inline comments.


================
Comment at: lib/Target/AArch64/AArch64ISelDAGToDAG.cpp:335
+  // It is worth folding logical shift of up to three places.
+  if (auto *CSD = dyn_cast<ConstantSDNode>(V.getOperand(1))) {
+    unsigned ShiftVal = CSD->getZExtValue();
----------------
Shouldn't we be returning false if the 1st operand isn't a constant?

I guess I would expect something like:

  if (!isa<ConstantSDNode>(V.getOperand(1)))
    return false;

  auto *CSD = cast<ConstantSDNode>(V.getOperand(1))
  unsigned ShiftVal = CSD->getZExtValue();
    if (ShiftVal > 3)
      return false;

  ...


https://reviews.llvm.org/D31113