[PATCH] D31254: [SDAG] Fix zeroExtend assertion error

[Nirav Dave via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL298604: [SDAG] Fix zeroExtend assertion error (authored by niravd).

Changed prior to commit:
  https://reviews.llvm.org/D31254?vs=92687&id=92799#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D31254

Files:
  llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/trunk/test/CodeGen/X86/pr32284.ll


Index: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
===================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -7277,13 +7277,14 @@
                                        LN0->getChain(),
                                        LN0->getBasePtr(), N0.getValueType(),
                                        LN0->getMemOperand());
-      CombineTo(N, ExtLoad);
+
       SDValue Trunc = DAG.getNode(ISD::TRUNCATE, SDLoc(N0),
                                   N0.getValueType(), ExtLoad);
       CombineTo(N0.getNode(), Trunc, ExtLoad.getValue(1));
 
       ExtendSetCCUses(SetCCs, Trunc, ExtLoad, SDLoc(N),
                       ISD::ZERO_EXTEND);
+      CombineTo(N, ExtLoad);
       return SDValue(N, 0);   // Return N so it doesn't get rechecked!
     }
   }
Index: llvm/trunk/test/CodeGen/X86/pr32284.ll
===================================================================
--- llvm/trunk/test/CodeGen/X86/pr32284.ll
+++ llvm/trunk/test/CodeGen/X86/pr32284.ll
@@ -0,0 +1,32 @@
+; RUN: llc -O0 -mtriple=i686-unknown -mcpu=skx -o - %s
+; RUN: llc -O0 -mtriple=x86_64-unknown -mcpu=skx  -o - %s
+; RUN: llc -mtriple=i686-unknown -mcpu=skx  -o - %s
+; RUN: llc -mtriple=x86_64-unknown -mcpu=skx  -o - %s
+
+ at c = external constant i8, align 1
+
+define void @foo() {
+entry:
+  %a = alloca i8, align 1
+  %b = alloca i32, align 4
+  %0 = load i8, i8* @c, align 1
+  %conv = zext i8 %0 to i32
+  %sub = sub nsw i32 0, %conv
+  %conv1 = sext i32 %sub to i64
+  %sub2 = sub nsw i64 0, %conv1
+  %conv3 = trunc i64 %sub2 to i8
+  %tobool = icmp ne i8 %conv3, 0
+  %frombool = zext i1 %tobool to i8
+  store i8 %frombool, i8* %a, align 1
+  %1 = load i8, i8* @c, align 1
+  %tobool4 = icmp ne i8 %1, 0
+  %lnot = xor i1 %tobool4, true
+  %lnot5 = xor i1 %lnot, true
+  %conv6 = zext i1 %lnot5 to i32
+  %2 = load i8, i8* @c, align 1
+  %conv7 = zext i8 %2 to i32
+  %cmp = icmp sle i32 %conv6, %conv7
+  %conv8 = zext i1 %cmp to i32
+  store i32 %conv8, i32* %b, align 4
+  ret void
+}


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