[PATCH] D31124: AMDGPU/SI: Add lane tracking to SI Scheduler
Stanislav Mekhanoshin via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 22 15:23:52 PDT 2017
rampitec added a comment.
In https://reviews.llvm.org/D31124#708105, @axeldavy wrote:
> Si scheduler has a test file: test/CodeGen/AMDGPU/si-scheduler.ll
>
> But perhaps you meant a test with subreg ?
> I'm afraid it's hard to design a test for subregs specifically, since if the ops using subregs are inside the same blocks, the blocks inputs and outputs won't have subregs. And block creation algorithms can vary.
You can create a MIR test. For example schedule-regpressure.mir runs only machine scheduler.
Repository:
rL LLVM
https://reviews.llvm.org/D31124
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