[llvm] r298439 - GlobalISel: widen booleans by zero-extending to a byte.
Tim Northover via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 21 14:12:05 PDT 2017
Author: tnorthover
Date: Tue Mar 21 16:12:04 2017
New Revision: 298439
URL: http://llvm.org/viewvc/llvm-project?rev=298439&view=rev
Log:
GlobalISel: widen booleans by zero-extending to a byte.
A bool is represented by a single byte, which the ARM ABI requires to be either
0 or 1. So we cannot use G_ANYEXT when legalizing the type.
Modified:
llvm/trunk/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir
Modified: llvm/trunk/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/LegalizerHelper.cpp?rev=298439&r1=298438&r2=298439&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/GlobalISel/LegalizerHelper.cpp (original)
+++ llvm/trunk/lib/CodeGen/GlobalISel/LegalizerHelper.cpp Tue Mar 21 16:12:04 2017
@@ -433,7 +433,7 @@ LegalizerHelper::widenScalar(MachineInst
"illegal to increase number of bytes modified by a store");
unsigned SrcExt = MRI.createGenericVirtualRegister(WideTy);
- MIRBuilder.buildAnyExt(SrcExt, MI.getOperand(0).getReg());
+ MIRBuilder.buildZExt(SrcExt, MI.getOperand(0).getReg());
MIRBuilder.buildStore(SrcExt, MI.getOperand(1).getReg(),
**MI.memoperands_begin());
MI.eraseFromParent();
Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir?rev=298439&r1=298438&r2=298439&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir Tue Mar 21 16:12:04 2017
@@ -82,7 +82,7 @@ body: |
%0(p0) = COPY %x0
%1(s32) = COPY %w1
- ; CHECK: [[BIT8:%[0-9]+]](s8) = G_ANYEXT %2(s1)
+ ; CHECK: [[BIT8:%[0-9]+]](s8) = G_ZEXT %2(s1)
; CHECK: G_STORE [[BIT8]](s8), %0(p0) :: (store 1 into %ir.addr)
%2(s1) = G_TRUNC %1
G_STORE %2, %0 :: (store 1 into %ir.addr)
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