[llvm] r298311 - GlobalISel: add implicit defs & uses when mutating an instruction.

[Tim Northover via llvm-commits]

Author: tnorthover
Date: Mon Mar 20 16:58:23 2017
New Revision: 298311

URL: http://llvm.org/viewvc/llvm-project?rev=298311&view=rev
Log:
GlobalISel: add implicit defs & uses when mutating an instruction.

Otherwise a scheduler might do bad things to the code we produce.

Modified:
    llvm/trunk/test/CodeGen/AArch64/GlobalISel/select-binop.mir
    llvm/trunk/utils/TableGen/GlobalISelEmitter.cpp

Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/select-binop.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/select-binop.mir?rev=298311&r1=298310&r2=298311&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/select-binop.mir (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/select-binop.mir Mon Mar 20 16:58:23 2017
@@ -224,7 +224,7 @@ registers:
 # CHECK:  body:
 # CHECK:    %0 = COPY %w0
 # CHECK:    %1 = COPY %w1
-# CHECK:    %2 = SUBSWrr %0, %1
+# CHECK:    %2 = SUBSWrr %0, %1, implicit-def %nzcv
 body:             |
   bb.0:
     liveins: %w0, %w1
@@ -254,7 +254,7 @@ registers:
 # CHECK:  body:
 # CHECK:    %0 = COPY %x0
 # CHECK:    %1 = COPY %x1
-# CHECK:    %2 = SUBSXrr %0, %1
+# CHECK:    %2 = SUBSXrr %0, %1, implicit-def %nzcv
 body:             |
   bb.0:
     liveins: %x0, %x1

Modified: llvm/trunk/utils/TableGen/GlobalISelEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/GlobalISelEmitter.cpp?rev=298311&r1=298310&r2=298311&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/GlobalISelEmitter.cpp (original)
+++ llvm/trunk/utils/TableGen/GlobalISelEmitter.cpp Mon Mar 20 16:58:23 2017
@@ -835,8 +835,25 @@ public:
   void emitCxxActionStmts(raw_ostream &OS, RuleMatcher &Rule,
                           StringRef RecycleVarName) const override {
     if (canMutate()) {
-      OS << RecycleVarName << ".setDesc(TII.get(" << I->Namespace
+      OS << "    " << RecycleVarName << ".setDesc(TII.get(" << I->Namespace
          << "::" << I->TheDef->getName() << "));\n";
+
+      if (!I->ImplicitDefs.empty() || !I->ImplicitUses.empty()) {
+        OS << "    auto MIB = MachineInstrBuilder(MF, &" << RecycleVarName
+           << ");\n";
+
+        for (auto Def : I->ImplicitDefs) {
+          auto Namespace = Def->getValueAsString("Namespace");
+          OS << "    MIB.addDef(" << Namespace << "::" << Def->getName()
+             << ", RegState::Implicit);\n";
+        }
+        for (auto Use : I->ImplicitUses) {
+          auto Namespace = Use->getValueAsString("Namespace");
+          OS << "    MIB.addUse(" << Namespace << "::" << Use->getName()
+             << ", RegState::Implicit);\n";
+        }
+      }
+
       OS << "    MachineInstr &NewI = " << RecycleVarName << ";\n";
       return;
     }