[PATCH] D30870: [Fuchsia] Use %gs for ABI slots under -mcmodel=kernel
Evgeniy Stepanov via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Mar 20 13:47:58 PDT 2017
This revision was automatically updated to reflect the committed changes.
Closed by commit rL298302: [Fuchsia] Use %gs for ABI slots under -mcmodel=kernel (authored by eugenis).
Changed prior to commit:
https://reviews.llvm.org/D30870?vs=91483&id=92378#toc
Repository:
rL LLVM
https://reviews.llvm.org/D30870
Files:
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
Index: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
===================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
@@ -2077,7 +2077,7 @@
if (hasStackGuardSlotTLS(Subtarget.getTargetTriple())) {
if (Subtarget.isTargetFuchsia()) {
// <magenta/tls.h> defines MX_TLS_STACK_GUARD_OFFSET with this value.
- return SegmentOffset(IRB, 0x10, 257);
+ return SegmentOffset(IRB, 0x10, getAddressSpace());
} else {
// %fs:0x28, unless we're using a Kernel code model, in which case
// it's %gs:0x28. gs:0x14 on i386.
@@ -2142,7 +2142,7 @@
// Fuchsia is similar.
if (Subtarget.isTargetFuchsia()) {
// <magenta/tls.h> defines MX_TLS_UNSAFE_SP_OFFSET with this value.
- return SegmentOffset(IRB, 0x18, 257);
+ return SegmentOffset(IRB, 0x18, getAddressSpace());
}
return TargetLowering::getSafeStackPointerLocation(IRB);
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