[PATCH] D30744: Improve machine schedulers for in-order processors

[Javed Absar via Phabricator via llvm-commits]

javed.absar updated this revision to Diff 92374.
javed.absar added a comment.

Hi Andrew:
Thanks for the help. I have made the changes as you suggested (unless I misunderstood some parts). Please have a look.
Thanks  a  lot.
Javed


https://reviews.llvm.org/D30744

Files:
  include/llvm/CodeGen/TargetSchedule.h
  include/llvm/MC/MCSchedule.h
  include/llvm/Target/TargetSchedule.td
  lib/CodeGen/MachineScheduler.cpp
  lib/CodeGen/TargetSchedule.cpp
  lib/Target/ARM/ARMScheduleR52.td
  test/CodeGen/ARM/single-issue-r52.mir
  utils/TableGen/SubtargetEmitter.cpp

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D30744.92374.patch
Type: text/x-patch
Size: 11595 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20170320/31d88913/attachment.bin>