[PATCH] D30968: [AVX-512] Fix accidental uses of AH/BH/CH/DH after copies to/from mask registers

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

That's great news! But this problem isn't unique to VK1. This test fails in 32-bit mode with avx512vl

define void @test_cmp_d_256(<8 x i32> %a0, <8 x i32> %a1, i8* %foo) {

  %res0 = call i8 @llvm.x86.avx512.mask.cmp.d.256(<8 x i32> %a0, <8 x i32> %a1, i32 0, i8 -1)
  %res1 = call i8 @llvm.x86.avx512.mask.cmp.d.256(<8 x i32> %a0, <8 x i32> %a1, i32 1, i8 -1)
  %res2 = call i8 @llvm.x86.avx512.mask.cmp.d.256(<8 x i32> %a0, <8 x i32> %a1, i32 2, i8 -1)
  %res3 = call i8 @llvm.x86.avx512.mask.cmp.d.256(<8 x i32> %a0, <8 x i32> %a1, i32 3, i8 -1)
  %res4 = call i8 @llvm.x86.avx512.mask.cmp.d.256(<8 x i32> %a0, <8 x i32> %a1, i32 4, i8 -1)
  %res5 = call i8 @llvm.x86.avx512.mask.cmp.d.256(<8 x i32> %a0, <8 x i32> %a1, i32 5, i8 -1)
  %res6 = call i8 @llvm.x86.avx512.mask.cmp.d.256(<8 x i32> %a0, <8 x i32> %a1, i32 6, i8 -1)
  %res7 = call i8 @llvm.x86.avx512.mask.cmp.d.256(<8 x i32> %a0, <8 x i32> %a1, i32 7, i8 -1)
  %vec0 = add i8 %res0, %res1
  %vec1 = add i8 %res2, %res3
  %vec2 = add i8 %res4, %res5
  %vec3 = add i8 %res5, %res6
  %vec4 = and i8 %vec0, %vec1
  %vec5 = and i8 %vec2, %vec3
  %vec6 = add i8 %vec4, %vec5
  store i8 %vec6, i8* %foo
  ret void

}

declare i8 @llvm.x86.avx512.mask.cmp.d.256(<8 x i32>, <8 x i32>, i32, i8) nounwind readnone


https://reviews.llvm.org/D30968