[llvm] r298221 - [GlobalISel] Move method definition to the proper file. NFC.
Ahmed Bougacha via llvm-commits
llvm-commits at lists.llvm.org
Sun Mar 19 09:12:48 PDT 2017
Author: ab
Date: Sun Mar 19 11:12:48 2017
New Revision: 298221
URL: http://llvm.org/viewvc/llvm-project?rev=298221&view=rev
Log:
[GlobalISel] Move method definition to the proper file. NFC.
Modified:
llvm/trunk/lib/CodeGen/GlobalISel/InstructionSelect.cpp
llvm/trunk/lib/CodeGen/GlobalISel/InstructionSelector.cpp
Modified: llvm/trunk/lib/CodeGen/GlobalISel/InstructionSelect.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/InstructionSelect.cpp?rev=298221&r1=298220&r2=298221&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/GlobalISel/InstructionSelect.cpp (original)
+++ llvm/trunk/lib/CodeGen/GlobalISel/InstructionSelect.cpp Sun Mar 19 11:12:48 2017
@@ -177,22 +177,3 @@ bool InstructionSelect::runOnMachineFunc
// FIXME: Should we accurately track changes?
return true;
}
-
-bool InstructionSelector::isOperandImmEqual(
- const MachineOperand &MO, int64_t Value,
- const MachineRegisterInfo &MRI) const {
- // TODO: We should also test isImm() and isCImm() too but this isn't required
- // until a DAGCombine equivalent is implemented.
-
- if (MO.isReg()) {
- MachineInstr *Def = MRI.getVRegDef(MO.getReg());
- if (Def->getOpcode() != TargetOpcode::G_CONSTANT)
- return false;
- assert(Def->getOperand(1).isCImm() &&
- "G_CONSTANT values must be constants");
- const ConstantInt &Imm = *Def->getOperand(1).getCImm();
- return Imm.getBitWidth() <= 64 && Imm.getSExtValue() == Value;
- }
-
- return false;
-}
Modified: llvm/trunk/lib/CodeGen/GlobalISel/InstructionSelector.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/InstructionSelector.cpp?rev=298221&r1=298220&r2=298221&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/GlobalISel/InstructionSelector.cpp (original)
+++ llvm/trunk/lib/CodeGen/GlobalISel/InstructionSelector.cpp Sun Mar 19 11:12:48 2017
@@ -14,6 +14,8 @@
#include "llvm/CodeGen/GlobalISel/RegisterBankInfo.h"
#include "llvm/CodeGen/GlobalISel/Utils.h"
#include "llvm/CodeGen/MachineInstr.h"
+#include "llvm/CodeGen/MachineRegisterInfo.h"
+#include "llvm/IR/Constants.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetRegisterInfo.h"
@@ -65,3 +67,22 @@ bool InstructionSelector::constrainSelec
}
return true;
}
+
+bool InstructionSelector::isOperandImmEqual(
+ const MachineOperand &MO, int64_t Value,
+ const MachineRegisterInfo &MRI) const {
+ // TODO: We should also test isImm() and isCImm() too but this isn't required
+ // until a DAGCombine equivalent is implemented.
+
+ if (MO.isReg()) {
+ MachineInstr *Def = MRI.getVRegDef(MO.getReg());
+ if (Def->getOpcode() != TargetOpcode::G_CONSTANT)
+ return false;
+ assert(Def->getOperand(1).isCImm() &&
+ "G_CONSTANT values must be constants");
+ const ConstantInt &Imm = *Def->getOperand(1).getCImm();
+ return Imm.getBitWidth() <= 64 && Imm.getSExtValue() == Value;
+ }
+
+ return false;
+}
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