[PATCH] D30971: [MIR] Support Customed Register Mask and CSRs

Phabricator via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Mar 19 01:26:44 PDT 2017


This revision was automatically updated to reflect the committed changes.
Closed by commit rL298207: [MIR] Support Customed Register Mask and CSRs (authored by orenb).

Changed prior to commit:
  https://reviews.llvm.org/D30971?vs=91995&id=92265#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D30971

Files:
  llvm/trunk/include/llvm/CodeGen/MachineRegisterInfo.h
  llvm/trunk/lib/CodeGen/MIRParser/MIParser.cpp
  llvm/trunk/lib/CodeGen/MIRParser/MIRParser.cpp
  llvm/trunk/lib/CodeGen/MIRPrinter.cpp
  llvm/trunk/lib/CodeGen/MachineRegisterInfo.cpp
  llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
  llvm/trunk/test/CodeGen/MIR/Generic/dynamic-regmask.ll
  llvm/trunk/test/CodeGen/MIR/X86/used-physical-register-info.mir

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