[lld] r298168 - Compute Config member function return values only once.

Rui Ueyama via llvm-commits llvm-commits at lists.llvm.org
Fri Mar 17 16:29:01 PDT 2017


Author: ruiu
Date: Fri Mar 17 18:29:01 2017
New Revision: 298168

URL: http://llvm.org/viewvc/llvm-project?rev=298168&view=rev
Log:
Compute Config member function return values only once.

We had a few Config member functions that returns configuration values.
For example, we had is64() which returns true if the target is 64-bit.
The return values of these functions are constant and never change.

This patch is to compute them only once to make it clear that they'll
never change.

Modified:
    lld/trunk/ELF/Config.h
    lld/trunk/ELF/Driver.cpp
    lld/trunk/ELF/EhFrame.cpp
    lld/trunk/ELF/ICF.cpp
    lld/trunk/ELF/InputFiles.cpp
    lld/trunk/ELF/InputFiles.h
    lld/trunk/ELF/InputSection.cpp
    lld/trunk/ELF/LTO.cpp
    lld/trunk/ELF/MarkLive.cpp
    lld/trunk/ELF/OutputSections.cpp
    lld/trunk/ELF/Relocations.cpp
    lld/trunk/ELF/SyntheticSections.cpp
    lld/trunk/ELF/SyntheticSections.h
    lld/trunk/ELF/Target.cpp
    lld/trunk/ELF/Thunks.cpp
    lld/trunk/ELF/Writer.cpp

Modified: lld/trunk/ELF/Config.h
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/Config.h?rev=298168&r1=298167&r2=298168&view=diff
==============================================================================
--- lld/trunk/ELF/Config.h (original)
+++ lld/trunk/ELF/Config.h Fri Mar 17 18:29:01 2017
@@ -165,14 +165,29 @@ struct Configuration {
   unsigned Optimize;
   unsigned ThinLTOJobs;
 
-  // Returns true if target is 64 bit.
-  bool is64() const { return EKind == ELF64LEKind || EKind == ELF64BEKind; }
+  // The following config options do not directly correspond to any
+  // particualr command line options.
 
-  // Returns true if the target is little endian.
-  bool isLE() const { return EKind == ELF32LEKind || EKind == ELF64LEKind; }
+  // True if we need to pass through relocations in input files to the
+  // output file. Usually false because we consume relocations.
+  bool CopyRelocs;
 
-  // Returns 4 or 8 for ELF32 or ELF64, respectively.
-  int wordsize() const { return is64() ? 8 : 4; }
+  // True if the target is little-endian. False if the target is big-endian.
+  bool IsLE;
+
+  // True if the target is the little-endian MIPS64.
+  //
+  // The reason why we have this variable only for the MIPS is because
+  // we use this often.  Some ELF headers for MIPS64EL are in a
+  // mixed-endian (which is horrible and I'd say that's a serious spec
+  // bug), and we need to know whether we are reading MIPS ELF files or
+  // not in various places.
+  //
+  // (Note that MIPS64EL is not a typo for MIPS64LE. This is the official
+  // name whatever that means. A fun hypothesis is that "EL" is short for
+  // little-endian written in the little-endian order, but I don't know
+  // if that's true.)
+  bool IsMips64EL;
 
   // The ELF spec defines two types of relocation table entries, RELA and
   // REL. RELA is a triplet of (offset, info, addend) while REL is a
@@ -185,36 +200,16 @@ struct Configuration {
   // been easier to write code to process relocations, but it's too late
   // to change the spec.)
   //
-  // Each ABI defines its relocation type. This function returns that.
-  // As far as we know, all 64-bit ABIs are using RELA. A few 32-bit ABIs
-  // are using RELA too.
-  bool isRela() const {
-    bool IsX32Abi = (EKind == ELF32LEKind && EMachine == llvm::ELF::EM_X86_64);
-    return is64() || IsX32Abi || MipsN32Abi;
-  }
-
-  // Returns true if we need to pass through relocations in input
-  // files to the output file. Usually false because we consume
-  // relocations.
-  bool copyRelocs() const { return Relocatable || EmitRelocs; }
-
-  // Returns true if we are creating position-independent code.
-  bool pic() const { return Pie || Shared; }
-
-  // Returns true if the target is the little-endian MIPS64. The reason
-  // why we have this function only for the MIPS is because we use this
-  // function often. Some ELF headers for MIPS64EL are in a mixed-endian
-  // (which is horrible and I'd say that's a serious spec bug), and we
-  // need to know whether we are reading MIPS ELF files or not in various
-  // places.
-  //
-  // (Note that MIPS64EL is not a typo for MIPS64LE. This is the official
-  // name whatever that means. A fun hypothesis is that "EL" is short for
-  // little-endian written in the little-endian order, but I don't know
-  // if that's true.)
-  bool isMips64EL() const {
-    return EMachine == llvm::ELF::EM_MIPS && EKind == ELF64LEKind;
-  }
+  // Each ABI defines its relocation type. IsRela is true if target
+  // uses RELA. As far as we know, all 64-bit ABIs are using RELA. A
+  // few 32-bit ABIs are using RELA too.
+  bool IsRela;
+
+  // True if we are creating position-independent code.
+  bool Pic;
+
+  // 4 for ELF32, 8 for ELF64.
+  int Wordsize;
 };
 
 // The only instance of Configuration struct.

Modified: lld/trunk/ELF/Driver.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/Driver.cpp?rev=298168&r1=298167&r2=298168&view=diff
==============================================================================
--- lld/trunk/ELF/Driver.cpp (original)
+++ lld/trunk/ELF/Driver.cpp Fri Mar 17 18:29:01 2017
@@ -65,6 +65,8 @@ BumpPtrAllocator elf::BAlloc;
 StringSaver elf::Saver{BAlloc};
 std::vector<SpecificAllocBase *> elf::SpecificAllocBase::Instances;
 
+static void setConfigs();
+
 bool elf::link(ArrayRef<const char *> Args, bool CanExitEarly,
                raw_ostream &Error) {
   ErrorCount = 0;
@@ -327,6 +329,7 @@ void LinkerDriver::main(ArrayRef<const c
   initLLVM(Args);
   createFiles(Args);
   inferMachineType();
+  setConfigs();
   checkOptions(Args);
   if (ErrorCount)
     return;
@@ -696,6 +699,27 @@ void LinkerDriver::readConfigs(opt::Inpu
       readVersionScript(*Buffer);
 }
 
+// Some Config members do not directly correspond to any particular
+// command line options, but computed based on other Config values.
+// This function initialize such members. See Config.h for the details
+// of these values.
+static void setConfigs() {
+  ELFKind Kind = Config->EKind;
+  uint16_t Machine = Config->EMachine;
+  bool Is64 = (Kind == ELF64LEKind || Kind == ELF64BEKind);
+
+  // There is an ILP32 ABI for x86-64, although it's not very popular.
+  // It is called the x32 ABI.
+  bool IsX32 = (Kind == ELF32LEKind && Machine == EM_X86_64);
+
+  Config->CopyRelocs = (Config->Relocatable || Config->EmitRelocs);
+  Config->IsLE = (Kind == ELF32LEKind || Kind == ELF64LEKind);
+  Config->IsMips64EL = (Kind == ELF64LEKind && Machine == EM_MIPS);
+  Config->IsRela = Is64 || IsX32 || Config->MipsN32Abi;
+  Config->Pic = Config->Pie || Config->Shared;
+  Config->Wordsize = Is64 ? 8 : 4;
+}
+
 // Returns a value of "-format" option.
 static bool getBinaryOption(StringRef S) {
   if (S == "binary")
@@ -789,7 +813,7 @@ static uint64_t getImageBase(opt::InputA
   // has to be called after the variable is initialized.
   auto *Arg = Args.getLastArg(OPT_image_base);
   if (!Arg)
-    return Config->pic() ? 0 : Target->DefaultImageBase;
+    return Config->Pic ? 0 : Target->DefaultImageBase;
 
   StringRef S = Arg->getValue();
   uint64_t V;

Modified: lld/trunk/ELF/EhFrame.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/EhFrame.cpp?rev=298168&r1=298167&r2=298168&view=diff
==============================================================================
--- lld/trunk/ELF/EhFrame.cpp (original)
+++ lld/trunk/ELF/EhFrame.cpp Fri Mar 17 18:29:01 2017
@@ -123,11 +123,11 @@ template <class ELFT> void EhReader<ELFT
   failOn(ErrPos, "corrupted CIE (failed to read LEB128)");
 }
 
-template <class ELFT> static size_t getAugPSize(unsigned Enc) {
+static size_t getAugPSize(unsigned Enc) {
   switch (Enc & 0x0f) {
   case DW_EH_PE_absptr:
   case DW_EH_PE_signed:
-    return Config->wordsize();
+    return Config->Wordsize;
   case DW_EH_PE_udata2:
   case DW_EH_PE_sdata2:
     return 2;
@@ -145,7 +145,7 @@ template <class ELFT> void EhReader<ELFT
   uint8_t Enc = readByte();
   if ((Enc & 0xf0) == DW_EH_PE_aligned)
     failOn(D.data() - 1, "DW_EH_PE_aligned encoding is not supported");
-  size_t Size = getAugPSize<ELFT>(Enc);
+  size_t Size = getAugPSize(Enc);
   if (Size == 0)
     failOn(D.data() - 1, "unknown FDE encoding");
   if (Size >= D.size())

Modified: lld/trunk/ELF/ICF.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/ICF.cpp?rev=298168&r1=298167&r2=298168&view=diff
==============================================================================
--- lld/trunk/ELF/ICF.cpp (original)
+++ lld/trunk/ELF/ICF.cpp Fri Mar 17 18:29:01 2017
@@ -209,7 +209,7 @@ template <class RelTy>
 bool ICF<ELFT>::constantEq(ArrayRef<RelTy> RelsA, ArrayRef<RelTy> RelsB) {
   auto Eq = [](const RelTy &A, const RelTy &B) {
     return A.r_offset == B.r_offset &&
-           A.getType(Config->isMips64EL()) == B.getType(Config->isMips64EL()) &&
+           A.getType(Config->IsMips64EL) == B.getType(Config->IsMips64EL) &&
            getAddend<ELFT>(A) == getAddend<ELFT>(B);
   };
 

Modified: lld/trunk/ELF/InputFiles.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/InputFiles.cpp?rev=298168&r1=298167&r2=298168&view=diff
==============================================================================
--- lld/trunk/ELF/InputFiles.cpp (original)
+++ lld/trunk/ELF/InputFiles.cpp Fri Mar 17 18:29:01 2017
@@ -80,8 +80,8 @@ template <class ELFT> void elf::ObjectFi
   ObjectInfo ObjInfo;
   DWARFContextInMemory Dwarf(*Obj, &ObjInfo);
   DwarfLine.reset(new DWARFDebugLine(&Dwarf.getLineSection().Relocs));
-  DataExtractor LineData(Dwarf.getLineSection().Data,
-                         Config->isLE(), Config->wordsize());
+  DataExtractor LineData(Dwarf.getLineSection().Data, Config->IsLE,
+                         Config->Wordsize);
 
   // The second parameter is offset in .debug_line section
   // for compilation unit (CU) of interest. We have only one

Modified: lld/trunk/ELF/InputFiles.h
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/InputFiles.h?rev=298168&r1=298167&r2=298168&view=diff
==============================================================================
--- lld/trunk/ELF/InputFiles.h (original)
+++ lld/trunk/ELF/InputFiles.h Fri Mar 17 18:29:01 2017
@@ -166,7 +166,7 @@ public:
 
   template <typename RelT>
   SymbolBody &getRelocTargetSym(const RelT &Rel) const {
-    uint32_t SymIndex = Rel.getSymbol(Config->isMips64EL());
+    uint32_t SymIndex = Rel.getSymbol(Config->IsMips64EL);
     return getSymbolBody(SymIndex);
   }
 

Modified: lld/trunk/ELF/InputSection.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/InputSection.cpp?rev=298168&r1=298167&r2=298168&view=diff
==============================================================================
--- lld/trunk/ELF/InputSection.cpp (original)
+++ lld/trunk/ELF/InputSection.cpp Fri Mar 17 18:29:01 2017
@@ -239,13 +239,13 @@ void InputSection::copyRelocations(uint8
   // That happens because getSymbolIndex(...) call below performs
   // simple linear search.
   for (const RelTy &Rel : Rels) {
-    uint32_t Type = Rel.getType(Config->isMips64EL());
+    uint32_t Type = Rel.getType(Config->IsMips64EL);
     SymbolBody &Body = this->getFile<ELFT>()->getRelocTargetSym(Rel);
 
     auto *P = reinterpret_cast<typename ELFT::Rela *>(Buf);
     Buf += sizeof(RelTy);
 
-    if (Config->isRela())
+    if (Config->IsRela)
       P->r_addend = getAddend<ELFT>(Rel);
 
     // Output section VA is zero for -r, so r_offset is an offset within the
@@ -253,7 +253,7 @@ void InputSection::copyRelocations(uint8
     P->r_offset = RelocatedSection->OutSec->Addr +
                   RelocatedSection->getOffset(Rel.r_offset);
     P->setSymbolAndType(In<ELFT>::SymTab->getSymbolIndex(&Body), Type,
-                        Config->isMips64EL());
+                        Config->IsMips64EL);
 
     if (Body.Type == STT_SECTION) {
       // We combine multiple section symbols into only one per
@@ -271,7 +271,7 @@ void InputSection::copyRelocations(uint8
         continue;
       }
 
-      if (Config->isRela()) {
+      if (Config->IsRela) {
         P->r_addend += Body.getVA() - Section->getOutputSection()->Addr;
       } else if (Config->Relocatable) {
         const uint8_t *BufLoc = RelocatedSection->Data.begin() + Rel.r_offset;
@@ -466,7 +466,7 @@ template <class ELFT, class RelTy>
 void InputSection::relocateNonAlloc(uint8_t *Buf, ArrayRef<RelTy> Rels) {
   typedef typename ELFT::uint uintX_t;
   for (const RelTy &Rel : Rels) {
-    uint32_t Type = Rel.getType(Config->isMips64EL());
+    uint32_t Type = Rel.getType(Config->IsMips64EL);
     uint64_t Offset = getOffset(Rel.r_offset);
     uint8_t *BufLoc = Buf + Offset;
     int64_t Addend = getAddend<ELFT>(Rel);

Modified: lld/trunk/ELF/LTO.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/LTO.cpp?rev=298168&r1=298167&r2=298168&view=diff
==============================================================================
--- lld/trunk/ELF/LTO.cpp (original)
+++ lld/trunk/ELF/LTO.cpp Fri Mar 17 18:29:01 2017
@@ -73,7 +73,7 @@ static std::unique_ptr<lto::LTO> createL
   Conf.Options = InitTargetOptionsFromCodeGenFlags();
   Conf.Options.RelaxELFRelocations = true;
 
-  Conf.RelocModel = Config->pic() ? Reloc::PIC_ : Reloc::Static;
+  Conf.RelocModel = Config->Pic ? Reloc::PIC_ : Reloc::Static;
   Conf.CodeModel = GetCodeModelFromCMModel();
   Conf.DisableVerify = Config->DisableVerify;
   Conf.DiagHandler = diagnosticHandler;

Modified: lld/trunk/ELF/MarkLive.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/MarkLive.cpp?rev=298168&r1=298167&r2=298168&view=diff
==============================================================================
--- lld/trunk/ELF/MarkLive.cpp (original)
+++ lld/trunk/ELF/MarkLive.cpp Fri Mar 17 18:29:01 2017
@@ -55,7 +55,7 @@ template <class ELFT>
 static typename ELFT::uint getAddend(InputSectionBase &Sec,
                                      const typename ELFT::Rel &Rel) {
   return Target->getImplicitAddend(Sec.Data.begin() + Rel.r_offset,
-                                   Rel.getType(Config->isMips64EL()));
+                                   Rel.getType(Config->IsMips64EL));
 }
 
 template <class ELFT>

Modified: lld/trunk/ELF/OutputSections.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/OutputSections.cpp?rev=298168&r1=298167&r2=298168&view=diff
==============================================================================
--- lld/trunk/ELF/OutputSections.cpp (original)
+++ lld/trunk/ELF/OutputSections.cpp Fri Mar 17 18:29:01 2017
@@ -98,7 +98,7 @@ template <class ELFT> void OutputSection
   }
 
   uint32_t Type = this->Type;
-  if (!Config->copyRelocs() || (Type != SHT_RELA && Type != SHT_REL))
+  if (!Config->CopyRelocs || (Type != SHT_RELA && Type != SHT_REL))
     return;
 
   InputSection *First = Sections[0];

Modified: lld/trunk/ELF/Relocations.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/Relocations.cpp?rev=298168&r1=298167&r2=298168&view=diff
==============================================================================
--- lld/trunk/ELF/Relocations.cpp (original)
+++ lld/trunk/ELF/Relocations.cpp Fri Mar 17 18:29:01 2017
@@ -101,7 +101,7 @@ handleNoRelaxTlsRelocation(GOT *Got, uin
     // if we know that we are linking an executable. For ARM we resolve the
     // relocation when writing the Got. MIPS has a custom Got implementation
     // that writes the Module index in directly.
-    if (!Body.isPreemptible() && !Config->pic() && Config->EMachine == EM_ARM)
+    if (!Body.isPreemptible() && !Config->Pic && Config->EMachine == EM_ARM)
       Got->Relocations.push_back(
           {R_ABS, Target->TlsModuleIndexRel, Off, 0, &Body});
     else {
@@ -111,7 +111,7 @@ handleNoRelaxTlsRelocation(GOT *Got, uin
     }
   };
   if (isRelExprOneOf<R_MIPS_TLSLD, R_TLSLD_PC>(Expr)) {
-    if (Got->addTlsIndex() && (Config->pic() || Config->EMachine == EM_ARM))
+    if (Got->addTlsIndex() && (Config->Pic || Config->EMachine == EM_ARM))
       addModuleReloc(Body, Got, Got->getTlsIndexOff(), true);
     C.Relocations.push_back({Expr, Type, Offset, Addend, &Body});
     return 1;
@@ -244,7 +244,7 @@ template <endianness E> static int16_t r
 
 template <class RelTy>
 static uint32_t getMipsPairType(const RelTy *Rel, const SymbolBody &Sym) {
-  switch (Rel->getType(Config->isMips64EL())) {
+  switch (Rel->getType(Config->IsMips64EL)) {
   case R_MIPS_HI16:
     return R_MIPS_LO16;
   case R_MIPS_GOT16:
@@ -262,7 +262,7 @@ template <class ELFT, class RelTy>
 static int32_t findMipsPairedAddend(const uint8_t *Buf, const uint8_t *BufLoc,
                                     SymbolBody &Sym, const RelTy *Rel,
                                     const RelTy *End) {
-  uint32_t SymIndex = Rel->getSymbol(Config->isMips64EL());
+  uint32_t SymIndex = Rel->getSymbol(Config->IsMips64EL);
   uint32_t Type = getMipsPairType(Rel, Sym);
 
   // Some MIPS relocations use addend calculated from addend of the relocation
@@ -273,16 +273,16 @@ static int32_t findMipsPairedAddend(cons
     return 0;
 
   for (const RelTy *RI = Rel; RI != End; ++RI) {
-    if (RI->getType(Config->isMips64EL()) != Type)
+    if (RI->getType(Config->IsMips64EL) != Type)
       continue;
-    if (RI->getSymbol(Config->isMips64EL()) != SymIndex)
+    if (RI->getSymbol(Config->IsMips64EL) != SymIndex)
       continue;
     const endianness E = ELFT::TargetEndianness;
     return ((read32<E>(BufLoc) & 0xffff) << 16) +
            readSignedLo16<E>(Buf + RI->r_offset);
   }
   warn("can't find matching " + toString(Type) + " relocation for " +
-       toString(Rel->getType(Config->isMips64EL())));
+       toString(Rel->getType(Config->IsMips64EL)));
   return 0;
 }
 
@@ -325,12 +325,12 @@ isStaticLinkTimeConstant(RelExpr E, uint
   // These never do, except if the entire file is position dependent or if
   // only the low bits are used.
   if (E == R_GOT || E == R_PLT || E == R_TLSDESC)
-    return Target->usesOnlyLowPageBits(Type) || !Config->pic();
+    return Target->usesOnlyLowPageBits(Type) || !Config->Pic;
 
   if (isPreemptible(Body, Type))
     return false;
 
-  if (!Config->pic())
+  if (!Config->Pic)
     return true;
 
   bool AbsVal = isAbsoluteValue<ELFT>(Body);
@@ -515,7 +515,7 @@ static RelExpr adjustExpr(const elf::Obj
   // This relocation would require the dynamic linker to write a value to read
   // only memory. We can hack around it if we are producing an executable and
   // the refered symbol can be preemepted to refer to the executable.
-  if (Config->Shared || (Config->pic() && !isRelExpr(Expr))) {
+  if (Config->Shared || (Config->Pic && !isRelExpr(Expr))) {
     error(S.getLocation<ELFT>(RelOff) + ": can't create dynamic relocation " +
           toString(Type) + " against " +
           (Body.getName().empty() ? "local symbol in readonly segment"
@@ -575,7 +575,7 @@ template <class ELFT, class RelTy>
 static int64_t computeAddend(const elf::ObjectFile<ELFT> &File,
                              const uint8_t *SectionData, const RelTy *End,
                              const RelTy &RI, RelExpr Expr, SymbolBody &Body) {
-  uint32_t Type = RI.getType(Config->isMips64EL());
+  uint32_t Type = RI.getType(Config->IsMips64EL);
   int64_t Addend = getAddend<ELFT>(RI);
   const uint8_t *BufLoc = SectionData + RI.r_offset;
   if (!RelTy::IsRela)
@@ -592,7 +592,7 @@ static int64_t computeAddend(const elf::
     if (Expr == R_MIPS_GOTREL && Body.isLocal())
       Addend += File.MipsGp0;
   }
-  if (Config->pic() && Config->EMachine == EM_PPC64 && Type == R_PPC64_TOC)
+  if (Config->Pic && Config->EMachine == EM_PPC64 && Type == R_PPC64_TOC)
     Addend += getPPC64TocBase();
   return Addend;
 }
@@ -638,7 +638,7 @@ mergeMipsN32RelTypes(uint32_t Type, uint
   uint32_t Processed = 0;
   for (; I != E && Offset == I->r_offset; ++I) {
     ++Processed;
-    Type |= I->getType(Config->isMips64EL()) << (8 * Processed);
+    Type |= I->getType(Config->IsMips64EL) << (8 * Processed);
   }
   return std::make_pair(Type, Processed);
 }
@@ -682,7 +682,7 @@ static void scanRelocs(InputSectionBase
   for (auto I = Rels.begin(), E = Rels.end(); I != E; ++I) {
     const RelTy &RI = *I;
     SymbolBody &Body = File->getRelocTargetSym(RI);
-    uint32_t Type = RI.getType(Config->isMips64EL());
+    uint32_t Type = RI.getType(Config->IsMips64EL);
 
     if (Config->MipsN32Abi) {
       uint32_t Processed;
@@ -840,14 +840,13 @@ static void scanRelocs(InputSectionBase
       if (Body.isTls()) {
         DynType = Target->TlsGotRel;
         GotRE = R_TLS;
-      } else if (!Preemptible && Config->pic() && !isAbsolute<ELFT>(Body))
+      } else if (!Preemptible && Config->Pic && !isAbsolute<ELFT>(Body))
         DynType = Target->RelativeRel;
       else
         DynType = Target->GotRel;
 
       // FIXME: this logic is almost duplicated above.
-      bool Constant =
-          !Preemptible && !(Config->pic() && !isAbsolute<ELFT>(Body));
+      bool Constant = !Preemptible && !(Config->Pic && !isAbsolute<ELFT>(Body));
       if (!Constant)
         AddDyn({DynType, In<ELFT>::Got, Off, !Preemptible, &Body, 0});
       if (Constant || (!RelTy::IsRela && !Preemptible))

Modified: lld/trunk/ELF/SyntheticSections.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/SyntheticSections.cpp?rev=298168&r1=298167&r2=298168&view=diff
==============================================================================
--- lld/trunk/ELF/SyntheticSections.cpp (original)
+++ lld/trunk/ELF/SyntheticSections.cpp Fri Mar 17 18:29:01 2017
@@ -912,7 +912,7 @@ template <class ELFT> void MipsGotSectio
   // TLS symbol's values otherwise. To calculate the adjustments use offsets
   // for thread-local storage.
   // https://www.linux-mips.org/wiki/NPTL
-  if (TlsIndexOff != -1U && !Config->pic())
+  if (TlsIndexOff != -1U && !Config->Pic)
     writeUint<ELFT>(Buf + TlsIndexOff, 1);
   for (const SymbolBody *B : TlsEntries) {
     if (!B || B->isPreemptible())
@@ -950,7 +950,7 @@ void GotPltSection::writeTo(uint8_t *Buf
   Buf += Target->GotPltHeaderEntriesNum * Target->GotPltEntrySize;
   for (const SymbolBody *B : Entries) {
     Target->writeGotPlt(Buf, *B);
-    Buf += Config->wordsize();
+    Buf += Config->Wordsize;
   }
 }
 
@@ -974,7 +974,7 @@ size_t IgotPltSection::getSize() const {
 void IgotPltSection::writeTo(uint8_t *Buf) {
   for (const SymbolBody *B : Entries) {
     Target->writeIgotPlt(Buf, *B);
-    Buf += Config->wordsize();
+    Buf += Config->Wordsize;
   }
 }
 
@@ -1076,7 +1076,7 @@ template <class ELFT> void DynamicSectio
 
   this->Link = In<ELFT>::DynStrTab->OutSec->SectionIndex;
   if (In<ELFT>::RelaDyn->OutSec->Size > 0) {
-    bool IsRela = Config->isRela();
+    bool IsRela = Config->IsRela;
     add({IsRela ? DT_RELA : DT_REL, In<ELFT>::RelaDyn});
     add({IsRela ? DT_RELASZ : DT_RELSZ, In<ELFT>::RelaDyn->OutSec->Size});
     add({IsRela ? DT_RELAENT : DT_RELENT,
@@ -1096,7 +1096,7 @@ template <class ELFT> void DynamicSectio
     add({DT_PLTRELSZ, In<ELFT>::RelaPlt->OutSec->Size});
     add({Config->EMachine == EM_MIPS ? DT_MIPS_PLTGOT : DT_PLTGOT,
          In<ELFT>::GotPlt});
-    add({DT_PLTREL, uint64_t(Config->isRela() ? DT_RELA : DT_REL)});
+    add({DT_PLTREL, uint64_t(Config->IsRela ? DT_RELA : DT_REL)});
   }
 
   add({DT_SYMTAB, In<ELFT>::DynSymTab});
@@ -1205,10 +1205,10 @@ uint32_t DynamicReloc::getSymIndex() con
 
 template <class ELFT>
 RelocationSection<ELFT>::RelocationSection(StringRef Name, bool Sort)
-    : SyntheticSection(SHF_ALLOC, Config->isRela() ? SHT_RELA : SHT_REL,
+    : SyntheticSection(SHF_ALLOC, Config->IsRela ? SHT_RELA : SHT_REL,
                        sizeof(uintX_t), Name),
       Sort(Sort) {
-  this->Entsize = Config->isRela() ? sizeof(Elf_Rela) : sizeof(Elf_Rel);
+  this->Entsize = Config->IsRela ? sizeof(Elf_Rela) : sizeof(Elf_Rel);
 }
 
 template <class ELFT>
@@ -1220,21 +1220,21 @@ void RelocationSection<ELFT>::addReloc(c
 
 template <class ELFT, class RelTy>
 static bool compRelocations(const RelTy &A, const RelTy &B) {
-  bool AIsRel = A.getType(Config->isMips64EL()) == Target->RelativeRel;
-  bool BIsRel = B.getType(Config->isMips64EL()) == Target->RelativeRel;
+  bool AIsRel = A.getType(Config->IsMips64EL) == Target->RelativeRel;
+  bool BIsRel = B.getType(Config->IsMips64EL) == Target->RelativeRel;
   if (AIsRel != BIsRel)
     return AIsRel;
 
-  return A.getSymbol(Config->isMips64EL()) < B.getSymbol(Config->isMips64EL());
+  return A.getSymbol(Config->IsMips64EL) < B.getSymbol(Config->IsMips64EL);
 }
 
 template <class ELFT> void RelocationSection<ELFT>::writeTo(uint8_t *Buf) {
   uint8_t *BufBegin = Buf;
   for (const DynamicReloc &Rel : Relocs) {
     auto *P = reinterpret_cast<Elf_Rela *>(Buf);
-    Buf += Config->isRela() ? sizeof(Elf_Rela) : sizeof(Elf_Rel);
+    Buf += Config->IsRela ? sizeof(Elf_Rela) : sizeof(Elf_Rel);
 
-    if (Config->isRela())
+    if (Config->IsRela)
       P->r_addend = Rel.getAddend();
     P->r_offset = Rel.getOffset();
     if (Config->EMachine == EM_MIPS && Rel.getInputSec() == In<ELFT>::MipsGot)
@@ -1242,11 +1242,11 @@ template <class ELFT> void RelocationSec
       // allocated in the end of the GOT. We need to adjust the offset to take
       // in account 'local' and 'global' GOT entries.
       P->r_offset += In<ELFT>::MipsGot->getTlsOffset();
-    P->setSymbolAndType(Rel.getSymIndex(), Rel.Type, Config->isMips64EL());
+    P->setSymbolAndType(Rel.getSymIndex(), Rel.Type, Config->IsMips64EL);
   }
 
   if (Sort) {
-    if (Config->isRela())
+    if (Config->IsRela)
       std::stable_sort((Elf_Rela *)BufBegin,
                        (Elf_Rela *)BufBegin + Relocs.size(),
                        compRelocations<ELFT, Elf_Rela>);
@@ -2193,8 +2193,8 @@ size_t MergeSyntheticSection::getSize()
 }
 
 MipsRldMapSection::MipsRldMapSection()
-    : SyntheticSection(SHF_ALLOC | SHF_WRITE, SHT_PROGBITS,
-                       Config->wordsize(), ".rld_map") {}
+    : SyntheticSection(SHF_ALLOC | SHF_WRITE, SHT_PROGBITS, Config->Wordsize,
+                       ".rld_map") {}
 
 void MipsRldMapSection::writeTo(uint8_t *Buf) {
   // Apply filler from linker script.
@@ -2226,7 +2226,7 @@ void ARMExidxSentinelSection<ELFT>::writ
 
 ThunkSection::ThunkSection(OutputSection *OS, uint64_t Off)
     : SyntheticSection(SHF_ALLOC | SHF_EXECINSTR, SHT_PROGBITS,
-                       Config->wordsize(), ".text.thunk") {
+                       Config->Wordsize, ".text.thunk") {
   this->OutSec = OS;
   this->OutSecOff = Off;
 }

Modified: lld/trunk/ELF/SyntheticSections.h
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/SyntheticSections.h?rev=298168&r1=298167&r2=298168&view=diff
==============================================================================
--- lld/trunk/ELF/SyntheticSections.h (original)
+++ lld/trunk/ELF/SyntheticSections.h Fri Mar 17 18:29:01 2017
@@ -718,7 +718,7 @@ private:
 class MipsRldMapSection : public SyntheticSection {
 public:
   MipsRldMapSection();
-  size_t getSize() const override { return Config->wordsize(); }
+  size_t getSize() const override { return Config->Wordsize; }
   void writeTo(uint8_t *Buf) override;
 };
 

Modified: lld/trunk/ELF/Target.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/Target.cpp?rev=298168&r1=298167&r2=298168&view=diff
==============================================================================
--- lld/trunk/ELF/Target.cpp (original)
+++ lld/trunk/ELF/Target.cpp Fri Mar 17 18:29:01 2017
@@ -446,7 +446,7 @@ bool X86TargetInfo::isTlsInitialExecRel(
 void X86TargetInfo::writePltHeader(uint8_t *Buf) const {
   // Executable files and shared object files have
   // separate procedure linkage tables.
-  if (Config->pic()) {
+  if (Config->Pic) {
     const uint8_t V[] = {
         0xff, 0xb3, 0x04, 0x00, 0x00, 0x00, // pushl 4(%ebx)
         0xff, 0xa3, 0x08, 0x00, 0x00, 0x00, // jmp   *8(%ebx)
@@ -478,7 +478,7 @@ void X86TargetInfo::writePlt(uint8_t *Bu
   memcpy(Buf, Inst, sizeof(Inst));
 
   // jmp *foo at GOT(%ebx) or jmp *foo_in_GOT
-  Buf[1] = Config->pic() ? 0xa3 : 0x25;
+  Buf[1] = Config->Pic ? 0xa3 : 0x25;
   uint32_t Got = In<ELF32LE>::GotPlt->getVA();
   write32le(Buf + 2, Config->Shared ? GotEntryAddr - Got : GotEntryAddr);
   write32le(Buf + 7, RelOff);
@@ -944,7 +944,7 @@ RelExpr X86_64TargetInfo<ELFT>::adjustRe
   // We also don't relax test/binop instructions without REX byte,
   // they are 32bit operations and not common to have.
   assert(Type == R_X86_64_REX_GOTPCRELX);
-  return Config->pic() ? RelExpr : R_RELAX_GOT_PC_NOPIC;
+  return Config->Pic ? RelExpr : R_RELAX_GOT_PC_NOPIC;
 }
 
 // A subset of relaxations can only be applied for no-PIC. This method
@@ -1031,7 +1031,7 @@ void X86_64TargetInfo<ELFT>::relaxGot(ui
   if (Op != 0xff) {
     // We are relaxing a rip relative to an absolute, so compensate
     // for the old -4 addend.
-    assert(!Config->pic());
+    assert(!Config->Pic);
     relaxGotNoPic(Loc, Val + 4, Op, ModRm);
     return;
   }

Modified: lld/trunk/ELF/Thunks.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/Thunks.cpp?rev=298168&r1=298167&r2=298168&view=diff
==============================================================================
--- lld/trunk/ELF/Thunks.cpp (original)
+++ lld/trunk/ELF/Thunks.cpp Fri Mar 17 18:29:01 2017
@@ -241,12 +241,12 @@ static Thunk *addThunkArm(uint32_t Reloc
   case R_ARM_PC24:
   case R_ARM_PLT32:
   case R_ARM_JUMP24:
-    if (Config->pic())
+    if (Config->Pic)
       return make<ARMToThumbV7PILongThunk<ELFT>>(S);
     return make<ARMToThumbV7ABSLongThunk<ELFT>>(S);
   case R_ARM_THM_JUMP19:
   case R_ARM_THM_JUMP24:
-    if (Config->pic())
+    if (Config->Pic)
       return make<ThumbToARMV7PILongThunk<ELFT>>(S);
     return make<ThumbToARMV7ABSLongThunk<ELFT>>(S);
   }

Modified: lld/trunk/ELF/Writer.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/Writer.cpp?rev=298168&r1=298167&r2=298168&view=diff
==============================================================================
--- lld/trunk/ELF/Writer.cpp (original)
+++ lld/trunk/ELF/Writer.cpp Fri Mar 17 18:29:01 2017
@@ -248,7 +248,7 @@ template <class ELFT> void Writer<ELFT>:
   if (Config->Discard != DiscardPolicy::All)
     copyLocalSymbols();
 
-  if (Config->copyRelocs())
+  if (Config->CopyRelocs)
     addSectionSymbols();
 
   // Now that we have a complete set of output sections. This function
@@ -330,7 +330,7 @@ template <class ELFT> void Writer<ELFT>:
   In<ELFT>::DynStrTab = make<StringTableSection>(".dynstr", true);
   In<ELFT>::Dynamic = make<DynamicSection<ELFT>>();
   In<ELFT>::RelaDyn = make<RelocationSection<ELFT>>(
-      Config->isRela() ? ".rela.dyn" : ".rel.dyn", Config->ZCombreloc);
+      Config->IsRela ? ".rela.dyn" : ".rel.dyn", Config->ZCombreloc);
   In<ELFT>::ShStrTab = make<StringTableSection>(".shstrtab", false);
 
   Out::ElfHeader = make<OutputSection>("", 0, SHF_ALLOC);
@@ -368,9 +368,8 @@ template <class ELFT> void Writer<ELFT>:
   Add(In<ELFT>::BssRelRo);
 
   // Add MIPS-specific sections.
-  bool HasDynSymTab =
-      !Symtab<ELFT>::X->getSharedFiles().empty() || Config->pic() ||
-      Config->ExportDynamic;
+  bool HasDynSymTab = !Symtab<ELFT>::X->getSharedFiles().empty() ||
+                      Config->Pic || Config->ExportDynamic;
   if (Config->EMachine == EM_MIPS) {
     if (!Config->Shared && HasDynSymTab) {
       In<ELFT>::MipsRldMap = make<MipsRldMapSection>();
@@ -437,7 +436,7 @@ template <class ELFT> void Writer<ELFT>:
   // We always need to add rel[a].plt to output if it has entries.
   // Even for static linking it can contain R_[*]_IRELATIVE relocations.
   In<ELFT>::RelaPlt = make<RelocationSection<ELFT>>(
-      Config->isRela() ? ".rela.plt" : ".rel.plt", false /*Sort*/);
+      Config->IsRela ? ".rela.plt" : ".rel.plt", false /*Sort*/);
   Add(In<ELFT>::RelaPlt);
 
   // The RelaIplt immediately follows .rel.plt (.rel.dyn for ARM) to ensure
@@ -785,10 +784,10 @@ addOptionalRegular(StringRef Name, Secti
 template <class ELFT> void Writer<ELFT>::addRelIpltSymbols() {
   if (In<ELFT>::DynSymTab)
     return;
-  StringRef S = Config->isRela() ? "__rela_iplt_start" : "__rel_iplt_start";
+  StringRef S = Config->IsRela ? "__rela_iplt_start" : "__rel_iplt_start";
   addOptionalRegular<ELFT>(S, In<ELFT>::RelaIplt, 0, STV_HIDDEN, STB_WEAK);
 
-  S = Config->isRela() ? "__rela_iplt_end" : "__rel_iplt_end";
+  S = Config->IsRela ? "__rela_iplt_end" : "__rel_iplt_end";
   addOptionalRegular<ELFT>(S, In<ELFT>::RelaIplt, -1, STV_HIDDEN, STB_WEAK);
 }
 
@@ -1215,7 +1214,7 @@ template <class ELFT> void Writer<ELFT>:
       addOptionalRegular<ELFT>(Start, OS, 0);
       addOptionalRegular<ELFT>(End, OS, -1);
     } else {
-      if (Config->pic())
+      if (Config->Pic)
         OS = Out::ElfHeader;
       addOptionalRegular<ELFT>(Start, OS, 0);
       addOptionalRegular<ELFT>(End, OS, 0);
@@ -1637,7 +1636,7 @@ template <class ELFT> static uint8_t get
 }
 
 static uint16_t getELFType() {
-  if (Config->pic())
+  if (Config->Pic)
     return ET_DYN;
   if (Config->Relocatable)
     return ET_REL;




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