[PATCH] D31103: [AMDGPU] Add address space based alias analysis pass

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: lib/Target/AMDGPU/AMDGPUAliasAnalysis.cpp:75-81
+  const Value *Base = GetUnderlyingObject(Loc.Ptr, DL);
+  assert(Base->getType()->isPointerTy());
+
+  if(Base->getType()->getPointerAddressSpace() ==
+     AMDGPUAS::AddressSpaces::CONSTANT_ADDRESS) {
+    return true;
+  }
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We should probably be marking all constant loads in the frontend with invariant metadata.


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Comment at: lib/Target/AMDGPU/AMDGPUAliasAnalysis.cpp:83-101
+  if (const GlobalVariable *GV = dyn_cast<GlobalVariable>(Base)) {
+    if (GV->isConstant())
+      return true;
+  } else if (const Argument *Arg = dyn_cast<Argument>(Base)) {
+    const Function *F = Arg->getParent();
+    unsigned ArgNo = Arg->getArgNo();
+    /* On an argument, ReadOnly attribute indicates that the function does
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I think BasicAA will handle all of this, we should only need to handle the address spaces


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Comment at: test/CodeGen/AMDGPU/vectorize-global-local.ll:15-22
+define void @vectorize_global_local(i32 addrspace(1)* nocapture readonly, i32 addrspace(3)* nocapture) {
+  %3 = load i32, i32 addrspace(1)* %0, align 4
+  store i32 %3, i32 addrspace(3)* %1, align 4
+  %4 = getelementptr inbounds i32, i32 addrspace(1)* %0, i64 1
+  %5 = load i32, i32 addrspace(1)* %4, align 4
+  %6 = getelementptr inbounds i32, i32 addrspace(3)* %1, i32 1
+  store i32 %5, i32 addrspace(3)* %6, align 4
----------------
Should run instnamer on this


Repository:
  rL LLVM

https://reviews.llvm.org/D31103